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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b046f2dda22sm1231244666b.40.2025.09.08.02.49.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Sep 2025 02:49:54 -0700 (PDT) Message-ID: <5178a6b1-1b5a-40d9-af40-68ee13975509@oss.qualcomm.com> Date: Mon, 8 Sep 2025 11:49:52 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] i2c: qcom-cci: Add OPP table support and enforce FAST_PLUS requirements To: Stephan Gerhold Cc: Konrad Dybcio , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Loic Poulain , Robert Foss , Andi Shyti , Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org References: <20250904-topic-cci_updates-v1-0-d38559692703@oss.qualcomm.com> <20250904-topic-cci_updates-v1-4-d38559692703@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Yv8PR5YX c=1 sm=1 tr=0 ts=68bea6c4 cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=1skEbHYOOoY0r-gFCEEA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-GUID: Sdo5__-HL4Nke4NJu8ScyZK7yiDHlfHf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAxOCBTYWx0ZWRfX3U6DTL/Gs0bC U1zg/QjP67g2ELNPF9f8AVe8ESxpmCqYrbK0ZhQxpp6vYwzyTfypoBAKmQ44OwRmQEdXubH5Oa4 XwDuOKsxmeeVA0+8o6x0siuH27R7EnhAk2GQ0nHaCaRQk6A5UyF7TMAXl2cTA/y+O2Hq1dmEBz7 AegvrQgd3troLTswrCKMuGe3WZmMIMlxvCncQ6Zl+9GrPF0kbn2Pyshyxm5PJhibEc4ZDAJGSxq fytUMVsXd9mcXRqvoJlmoXB+q7HfmgIpAEn+WN7/CHluAViDWuhSnhGDKLpQ52NN9V76kJ7bR0h Vm0wC5yeI6uiSwlK+cGFOsxWbYuJLajueYVBAgLdbq8eHVxTQb+rJfSefTxCQwmJ7bvbRUnS0uI XhjjKLbu X-Proofpoint-ORIG-GUID: Sdo5__-HL4Nke4NJu8ScyZK7yiDHlfHf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-08_03,2025-09-08_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 suspectscore=0 phishscore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060018 On 9/8/25 10:46 AM, Stephan Gerhold wrote: > On Mon, Sep 08, 2025 at 10:43:50AM +0200, Konrad Dybcio wrote: >> On 9/8/25 10:36 AM, Stephan Gerhold wrote: >>> On Thu, Sep 04, 2025 at 04:31:23PM +0200, Konrad Dybcio wrote: >>>> From: Konrad Dybcio >>>> >>>> The CCI clock has voltage requirements, which need to be described >>>> through an OPP table. >>>> >>>> The 1 MHz FAST_PLUS mode requires the CCI core clock runs at 37,5 MHz >>>> (which is a value common across all SoCs), since it's not possible to >>>> reach the required timings with the default 19.2 MHz rate. >>>> >>>> Address both issues by introducing an OPP table and using it to vote >>>> for the faster rate. >>>> >>>> Signed-off-by: Konrad Dybcio >>> >>> Using an OPP table for a single static rate that remains the same over >>> the whole lifetime of the driver feels like overkill to me. Couldn't you >>> just put the "required-opps" directly into the device node so that it is >>> automatically applied when the device goes in/out of runtime suspend? >>> >>> And since you need to make DT additions anyway, couldn't you just use >>> "assigned-clock-rates" to avoid the need for a driver patch entirely? We >>> use that for e.g. USB clocks as well. >> >> This is futureproofing, in case someone invents FastMode++ with a higher >> dvfs requirement or for when the driver adds presets for a 19.2 MHz CCI >> clock which would (marginally) decrease power consumption >> > > If 19.2 MHz CCI clock is feasible and has lower voltage requirements, > then I would expect a separate entry for 19.2 MHz in the OPP table of > PATCH 5/5? The DT is unrelated to what functionality you implement in > the driver, and that would make the OPP table look less useless. :-) The frequency plan for 8280 does not recommend any rate != 37.5 MHz For x1e80100 however, the lovsvs_d1 corner is recommended to be 30 (yes, thirty) MHz, sourced from CAM_PLL8 for $reasons Konrad