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From: Marc Zyngier <marc.zyngier@arm.com>
To: Jia He <hejianet@gmail.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
	Jia He <jia.he@hxt-semitech.com>
Subject: Re: [PATCH] KVM: arm/arm64: don't set vtimer->cnt_ctl in kvm_arch_timer_handler
Date: Fri, 15 Dec 2017 09:09:05 +0000	[thread overview]
Message-ID: <519f0e33-4419-68be-32b4-11bb5e19cf17@arm.com> (raw)
In-Reply-To: <e5ccbf1c-6078-4c43-8aa3-fc226ed358f7@gmail.com>

On 15/12/17 02:27, Jia He wrote:
> 
> 

[...]

>> @@ -367,6 +368,7 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
>>   
>>   	/* Disable the virtual timer */
>>   	write_sysreg_el0(0, cntv_ctl);
>> +	isb();
> My only concern is whether this isb() is required here?
> Sorryif this is a stupid question.I understand little about arm arch 
> memory barrier. But seems isb will flush all the instruction prefetch.Do 
> you think if an timer interrupt irq arrives, arm will use the previous 
> instruction prefetch?


This barrier has little to do with prefetch. It just guarantees that the
code after the isb() is now running with a disabled virtual timer.
Otherwise, a CPU can freely reorder the write_sysreg() until the next
context synchronization event.

An interrupt coming between the write and the barrier will also act as a
context synchronization event. For more details, see the ARMv8 ARM (the
glossary has a section on the concept).

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2017-12-15  9:09 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-13  7:00 Jia He
2017-12-13  8:56 ` Marc Zyngier
2017-12-13  9:08   ` Auger Eric
2017-12-13  9:27     ` Marc Zyngier
2017-12-13  9:34       ` Christoffer Dall
2017-12-13  9:20   ` Christoffer Dall
2017-12-13  9:18 ` Christoffer Dall
2017-12-14  4:57   ` Jia He
2017-12-14  5:35     ` Jia He
2017-12-14 13:09     ` Christoffer Dall
2017-12-14 15:28       ` Jia He
2017-12-14 15:45         ` Christoffer Dall
2017-12-15  2:27           ` Jia He
2017-12-15  9:09             ` Marc Zyngier [this message]
2017-12-15 10:10               ` Christoffer Dall
2017-12-15 10:33                 ` Marc Zyngier
2017-12-15 11:15                   ` Christoffer Dall
2017-12-15 10:04             ` Christoffer Dall
2017-12-21  9:16               ` Jia He
2017-12-21 11:35                 ` Christoffer Dall

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