From: Paolo Bonzini <pbonzini@redhat.com>
To: Sasha Levin <sashal@kernel.org>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Maxim Levitsky <mlevitsk@redhat.com>,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH MANUALSEL 5.16 1/2] KVM: x86: lapic: don't touch irr_pending in kvm_apic_update_apicv when inhibiting it
Date: Tue, 1 Mar 2022 18:09:51 +0100 [thread overview]
Message-ID: <51a6e2a5-57d4-5f6d-79fa-13daa544266d@redhat.com> (raw)
In-Reply-To: <20220222140522.211548-1-sashal@kernel.org>
On 2/22/22 15:05, Sasha Levin wrote:
> From: Maxim Levitsky <mlevitsk@redhat.com>
>
> [ Upstream commit 755c2bf878607dbddb1423df9abf16b82205896f ]
>
> kvm_apic_update_apicv is called when AVIC is still active, thus IRR bits
> can be set by the CPU after it is called, and don't cause the irr_pending
> to be set to true.
>
> Also logic in avic_kick_target_vcpu doesn't expect a race with this
> function so to make it simple, just keep irr_pending set to true and
> let the next interrupt injection to the guest clear it.
>
> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
> Message-Id: <20220207155447.840194-9-mlevitsk@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Sasha Levin <sashal@kernel.org>
> ---
> arch/x86/kvm/lapic.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e8e383fbe8868..bfac6d0933c39 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2306,7 +2306,12 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu)
> apic->irr_pending = true;
> apic->isr_count = 1;
> } else {
> - apic->irr_pending = (apic_search_irr(apic) != -1);
> + /*
> + * Don't clear irr_pending, searching the IRR can race with
> + * updates from the CPU as APICv is still active from hardware's
> + * perspective. The flag will be cleared as appropriate when
> + * KVM injects the interrupt.
> + */
> apic->isr_count = count_vectors(apic->regs + APIC_ISR);
> }
> }
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo
prev parent reply other threads:[~2022-03-01 17:10 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 14:05 Sasha Levin
2022-02-22 14:05 ` [PATCH MANUALSEL 5.16 2/2] KVM: x86: nSVM: deal with L1 hypervisor that intercepts interrupts but lets L2 control them Sasha Levin
2022-03-01 17:10 ` Paolo Bonzini
2022-03-01 17:09 ` Paolo Bonzini [this message]
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