From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 698E034107C; Thu, 19 Feb 2026 17:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771523132; cv=none; b=HHebVUcgHGQbFPAWVoAwe1Wtz4H+Z7TUiZmoztVnsuUMXhQCHo/CYsEgdi/bOCRq0oXwkhO9E0qWDGM6ZlTVFEYAjYAVOohcuC4mnEuMpCNwDw5qBUj8T+iDYtjboLB00Gqg35blRk5ata9HwD8Yrl+QA7bbXCizE/lr68+iiI0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771523132; c=relaxed/simple; bh=TcREXtd47681GeYHFy4Ld1mK6K6MB7MwjdrQu79ZA9I=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=fAy4WnW1NMtMpESiEId1R2jszIz5bduVC8fULMaSkswYPIxa8fxMR6v22oZt30xpUZ8YHUENuuv7wJyqcDoHXkpQ88WdNIH3ZXS1ZK9xUmSsUR8jEIHRZmjVCkmfq4rA9EhJCUIjwG0Yf0p2DssD3gOw8LowiS0f01cUZSeHlhE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 138E1339; Thu, 19 Feb 2026 09:45:24 -0800 (PST) Received: from [10.1.196.46] (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 73B1F3F7D8; Thu, 19 Feb 2026 09:45:23 -0800 (PST) Message-ID: <51ef05be-a70c-4109-9d6f-6e8ca56b6133@arm.com> Date: Thu, 19 Feb 2026 17:45:21 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 13/19] x86/resctrl: Add PLZA state tracking and context switch handling To: "Luck, Tony" , Reinette Chatre Cc: "Moger, Babu" , "Moger, Babu" , Drew Fustini , "corbet@lwn.net" , "Dave.Martin@arm.com" , "james.morse@arm.com" , "tglx@kernel.org" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "peterz@infradead.org" , "juri.lelli@redhat.com" , "vincent.guittot@linaro.org" , "dietmar.eggemann@arm.com" , "rostedt@goodmis.org" , "bsegall@google.com" , "mgorman@suse.de" , "vschneid@redhat.com" , "akpm@linux-foundation.org" , "pawan.kumar.gupta@linux.intel.com" , "pmladek@suse.com" , "feng.tang@linux.alibaba.com" , "kees@kernel.org" , "arnd@arndb.de" , "fvdl@google.com" , "lirongqing@baidu.com" , "bhelgaas@google.com" , "seanjc@google.com" , "xin@zytor.com" , "Shukla, Manali" , "dapeng1.mi@linux.intel.com" , "chang.seok.bae@intel.com" , "Limonciello, Mario" , "naveen@kernel.org" , "elena.reshetova@intel.com" , "Lendacky, Thomas" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "peternewman@google.com" , "eranian@google.com" , "Shenoy, Gautham Ranjal" References: <679dcd01-05e5-476a-91dd-6d1d08637b3e@intel.com> <2b2d0168-307a-40c3-98fa-54902482e861@intel.com> <2416004a-5626-491d-819c-c470abbe0dd0@intel.com> <65c279fd-0e89-4a6a-b217-3184bd570e23@intel.com> From: Ben Horgan Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Tony, On 2/19/26 17:03, Luck, Tony wrote: >> Likely real implementation: >> >> Sub-components of each of the ideas above are encoded as a bitmask that >> is written to plza_mode. There is a file in the info/ directory listing >> which bits are supported on the current system (e.g. the "keep the same >> RMID" mode may be impractical on ARM, so it would not be listed as an >> option.) > > > In x86 terms where control and monitor functions are independent we > have: > > Control: > 1) Use default (CLOSID==0) for kernel > 2) Allocate just one CLOSID for kernel > 3) Allocate many CLOSIDs for kernel > > Monitor: > 1) Do not monitor kernel separately from user > 2) Use default (RMID==0) for kernel > 3) Allocate one RMID for kernel > 4) Allocate many RMIDs for kernel > > What options are possible on ARM & RISC-V? For ARM (MPAM) we have the same flexibility that we have for userspace as the kernel. At EL0 (userspace) the configuration of parid/pmg is in SYS_MPAM0_EL1 and in EL1 (kernel) it's in SYS_MPAM1_EL1. These are both per-cpu system registers and control the partid and pmg the cpu adds to its requests at the particular exception level (EL). Of the above we can do all the control, 1,2,3 and all the monitor except 1, so 2,3,4. With the caveat that if more than one partid/closid is used for the kernel then at least that number of pmg/monitors are used. This is as the monitors are not independent (as you say), i.e. a monitor is identified by the pair (partid, pmg). > > -Tony Thanks, Ben