From: "H. Peter Anvin" <hpa@zytor.com>
To: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Andi Kleen <andi@firstfloor.org>, Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
x86@kernel.org, lkml <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -tip ] x86/insn: Add Haswell-introduced opcodes
Date: Tue, 06 Aug 2013 22:03:08 -0700 [thread overview]
Message-ID: <5201D50C.3020602@zytor.com> (raw)
In-Reply-To: <5201D24F.8010403@hitachi.com>
On 08/06/2013 09:51 PM, Masami Hiramatsu wrote:
>
> Thanks, Andi also asked me to support them ;)
> As far as I can see, that requires more work to support
> EVEX decoding. And perhaps, I have to classify new instructions
> and operands and introduce new abbreviations/superscripts for
> them, because there is no opcode map in the above document.
>
> Would you intel guys have any idea about new opcode map?
>
What is it you need, specifically?
-hpa
next prev parent reply other threads:[~2013-08-07 5:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-06 7:37 Masami Hiramatsu
2013-08-06 15:16 ` H. Peter Anvin
2013-08-07 4:51 ` Masami Hiramatsu
2013-08-07 5:03 ` H. Peter Anvin [this message]
2013-08-07 6:01 ` Masami Hiramatsu
2013-08-06 15:19 ` [tip:x86/asm] x86, insn: Add new opcodes as of June, 2013 tip-bot for Masami Hiramatsu
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