From: MD Danish Anwar <danishanwar@ti.com>
To: Florian Fainelli <f.fainelli@gmail.com>,
Andrew Lunn <andrew@lunn.ch>, Diogo Ivo <diogo.ivo@siemens.com>,
Jan Kiszka <jan.kiszka@siemens.com>,
Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>,
Eric Dumazet <edumazet@google.com>,
"David S. Miller" <davem@davemloft.net>
Cc: <linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <srk@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Roger Quadros <rogerq@kernel.org>
Subject: Re: [PATCH net] net: ti: icssg-prueth: Fix start counter for ft1 filter
Date: Mon, 27 May 2024 11:53:27 +0530 [thread overview]
Message-ID: <520c5c8a-06a8-4ca0-93b1-3203ae210733@ti.com> (raw)
In-Reply-To: <bf1f7e35-45f9-4129-a41e-d255ad00c917@gmail.com>
On 25/05/24 3:35 am, Florian Fainelli wrote:
> On 5/24/24 02:37, MD Danish Anwar wrote:
>> The start counter for FT1 filter is wrongly set to 0 in the driver.
>> FT1 is used for source address violation (SAV) check and source address
>> starts at Byte 6 not Byte 0. Fix this by changing start counter to 6 in
>> icssg_ft1_set_mac_addr().
>>
>> Fixes: e9b4ece7d74b ("net: ti: icssg-prueth: Add Firmware config and
>> classification APIs.")
>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
>
> Would using ETH_ALEN not be a bit clearer here?
>
Yes that would make more sense. I will change it and post v2.
>> ---
>> drivers/net/ethernet/ti/icssg/icssg_classifier.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/ethernet/ti/icssg/icssg_classifier.c
>> b/drivers/net/ethernet/ti/icssg/icssg_classifier.c
>> index 79ba47bb3602..8dee737639b6 100644
>> --- a/drivers/net/ethernet/ti/icssg/icssg_classifier.c
>> +++ b/drivers/net/ethernet/ti/icssg/icssg_classifier.c
>> @@ -455,7 +455,7 @@ void icssg_ft1_set_mac_addr(struct regmap
>> *miig_rt, int slice, u8 *mac_addr)
>> {
>> const u8 mask_addr[] = { 0, 0, 0, 0, 0, 0, };
>> - rx_class_ft1_set_start_len(miig_rt, slice, 0, 6);
>> + rx_class_ft1_set_start_len(miig_rt, slice, 6, 6);
>> rx_class_ft1_set_da(miig_rt, slice, 0, mac_addr);
>> rx_class_ft1_set_da_mask(miig_rt, slice, 0, mask_addr);
>> rx_class_ft1_cfg_set_type(miig_rt, slice, 0, FT1_CFG_TYPE_EQ);
>>
>> base-commit: 66ad4829ddd0b5540dc0b076ef2818e89c8f720e
>
--
Thanks and Regards,
Danish
prev parent reply other threads:[~2024-05-27 6:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-24 9:37 MD Danish Anwar
2024-05-24 22:05 ` Florian Fainelli
2024-05-27 6:23 ` MD Danish Anwar [this message]
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