Re: [PATCH] mmc: sdhci-of-arasan: Add quirk to avoid erroneous msg

[Shawn Lin <shawn.lin@rock-chips.com>]

On 2018/2/27 23:05, Phil Edworthy wrote:
> Hi Shawn,
> 
> On 27 February 2018 14:42, Shawn Lin wrote:
>> On 2018/2/27 22:31, Phil Edworthy wrote:
>>> Hi Shawn,
>>>
>>> On 27 February 2018 14:28, Shawn Lin wrote:
>>>> 在 2018/2/27 21:55, Phil Edworthy 写道:
>>>>> Since the controller does not support the end-of-busy IRQ, don't use it.
>>>>> Otherwise, on older SD cards you will get lots of these messages:
>>>>> "mmc0: Got data interrupt 0x00000002 even though no data operation
>>>>> was
>>>> in progress"
>>>>>
>>>>
>>>> I'm afraid you have to explain which version of arasan's IP suffer
>>>> from this and what does the "older SD cards" mean?
>>> Ok, I'll try to find out the IP version...
>>> For "older SD cards", I can provide a list of a few cards that exhibit
>>> this problem and others that don't, is that enough info?
>>
>> What I meant is could you elaborate more about what kind of cards, e.g, are
>> them the  legacy SDSC cards or SDHC cards, or maybe they are only running
>> with defaut speed? or whatever, but not just with a vague "older" cards. :)
> Unfortunately, I have one SDHC card that works, one that doesn't. Both cards
> are running with a 50MHz SD clock. All I know is this:

Thanks for sharing these, though it looks wired as I never remember I
saw this problem when extensively tested SD cards on one of arasan
controllers in 2014.

> 
> SD cards that report unexpected interrupts:
> 2GB Sandisk Extreme III                     (e624 SD02G 1.89 GiB)
> 8GB Sandisk (SDHC class 4)              (aaaa SU08G 7.40 GiB)
> 8GB Sandisk Extreme III (SDHC class 6)    (bb4e SD08G 7.61 GiB)
> 
> SD cards that work ok:
> 16GB Samsung (microSDHC U1 class 10)          (0001 00000 14.6 GiB)
> 16GB Sandisk Ultra (microSDHC U1 class 10)    (aaaa SL16G 14.8 GiB)
> 32GB Sandisk Ultra (microSDHC U1 class 10)    (aaaa SL32G 29.7 GiB)
> 
> Thanks
> Phil
> 
>>>>> This has been reported on Xilinx devices that also use the Arasan IP.
>>>>> See https://patchwork.kernel.org/patch/8062871/
>>>>>
>>>>> This has been tested on the Renesas RZ/ND-DB board with the RZ/N1
>> SoC.
>>>>>
>>>>> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
>>>>> ---
>>>>>     drivers/mmc/host/sdhci-of-arasan.c | 3 ++-
>>>>>     1 file changed, 2 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/mmc/host/sdhci-of-arasan.c
>>>>> b/drivers/mmc/host/sdhci-of-arasan.c
>>>>> index c33a5f7..ab66e32 100644
>>>>> --- a/drivers/mmc/host/sdhci-of-arasan.c
>>>>> +++ b/drivers/mmc/host/sdhci-of-arasan.c
>>>>> @@ -290,7 +290,8 @@ static const struct sdhci_pltfm_data
>>>> sdhci_arasan_pdata = {
>>>>>     	.ops = &sdhci_arasan_ops,
>>>>>     	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
>>>>>     	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
>>>>> -			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
>>>>> +			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
>>>>> +			SDHCI_QUIRK2_STOP_WITH_TC,
>>>>>     };
>>>>>
>>>>>     static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32
>>>>> intmask)
>>>>>
>>>>
>>>>
>>>> --
>>>> Best Regards
>>>> Shawn Lin
>>>
>>>
>>>
>>>
>>
>>
>> --
>> Best Regards
>> Shawn Lin
> 
> 
> 
>