Re: [PATCH v16 2/3] dt-bindings: edac: nuvoton: Add document for NPCM memory controller

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 16/12/2022 08:31, Marvin Lin wrote:
> Add dt-bindings document for Nuvoton NPCM memory controller.
> 
> Signed-off-by: Marvin Lin <milkfafa@gmail.com>
> Reviewed-by: Rob Herring <robh@kernel.org>

So this is a 16th version but through this entire year you never Cced
the maintainers... You did not send a single version to the memory
controller maintainers.

I don't know why it is so big problem to use scripts/get_maintainers.pl.

> ---
>  .../memory-controllers/nuvoton,npcm-mc.yaml   | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-mc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-mc.yaml
> new file mode 100644
> index 000000000000..0e752a673453
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-mc.yaml

filename based on compatibles, so nuvoton,npcm-memory-controller.yaml

> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +

No blank lines.

> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/nuvoton,npcm-mc.yaml#



> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton NPCM Memory Controller
> +
> +maintainers:
> +  - Marvin Lin <kflin@nuvoton.com>
> +  - Stanley Chu <yschu@nuvoton.com>
> +
> +description: |
> +  The Nuvoton BMC SoC supports DDR4 memory with and without ECC (error
> +  correction check).
> +
> +  The memory controller supports single bit error correction, double bit
> +  error detection (in-line ECC in which a section (1/8th) of the memory
> +  device used to store data is used for ECC storage).
> +
> +  Note, the bootloader must configure ECC mode for the memory controller.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nuvoton,npcm750-memory-controller
> +      - nuvoton,npcm845-memory-controller
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    ahb {
> +        #address-cells = <1>;
> +        #size-cells = <1>;

Why do you need this node in the example?

> +        mc: memory-controller@f0824000 {
> +            compatible = "nuvoton,npcm750-memory-controller";
> +            reg = <0xf0824000 0x1000>;
> +            interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> +        };
> +    };

Best regards,
Krzysztof