From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE5E2C433EF for ; Thu, 30 Jun 2022 02:29:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231639AbiF3C3k (ORCPT ); Wed, 29 Jun 2022 22:29:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231623AbiF3C3j (ORCPT ); Wed, 29 Jun 2022 22:29:39 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E701E767F; Wed, 29 Jun 2022 19:29:37 -0700 (PDT) X-UUID: b4f413b992e541d7b3160804af19b7ad-20220630 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.7,REQID:b34c9f49-69f9-453d-91df-593f61f050a5,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:87442a2,CLOUDID:0ae22486-57f0-47ca-ba27-fe8c57fbf305,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: b4f413b992e541d7b3160804af19b7ad-20220630 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1078674193; Thu, 30 Jun 2022 10:29:31 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 30 Jun 2022 10:29:30 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 30 Jun 2022 10:29:27 +0800 Message-ID: <52747ddcdae8c1445b6bed00acec03da0806b068.camel@mediatek.com> Subject: Re: [PATCH v12 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver From: CK Hu To: Bo-Chen Chen , , , , , , , , , , CC: , , , , , , , , , , , Date: Thu, 30 Jun 2022 10:29:27 +0800 In-Reply-To: <20220627080341.5087-6-rex-bc.chen@mediatek.com> References: <20220627080341.5087-1-rex-bc.chen@mediatek.com> <20220627080341.5087-6-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Bo-Chen: On Mon, 2022-06-27 at 16:03 +0800, Bo-Chen Chen wrote: > From: Markus Schneider-Pargmann > > This patch adds a embedded displayport driver for the MediaTek mt8195 > SoC. > > It supports the MT8195, the embedded DisplayPort units. It offers > DisplayPort 1.4 with up to 4 lanes. > > The driver creates a child device for the phy. The child device will > never exist without the parent being active. As they are sharing a > register range, the parent passes a regmap pointer to the child so > that > both can work with the same register range. The phy driver sets > device > data that is read by the parent to get the phy device that can be > used > to control the phy properties. > > This driver is based on an initial version by > Jitao shi > > Signed-off-by: Markus Schneider-Pargmann > Signed-off-by: Guillaume Ranquet > [Bo-Chen: Cleanup the drivers and modify comments from reviewers] > Signed-off-by: Bo-Chen Chen > --- [snip] > + > +static int mtk_dp_dt_parse(struct mtk_dp *mtk_dp, > + struct platform_device *pdev) > +{ > + struct device_node *of_node = pdev->dev.of_node; > + struct device *dev = &pdev->dev; > + int ret = 0; > + void __iomem *base; > + u32 linkrate; > + int len; > + > + base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(base)) > + return PTR_ERR(base); > + > + mtk_dp->regs = devm_regmap_init_mmio(dev, base, > &mtk_dp_regmap_config); > + if (IS_ERR(mtk_dp->regs)) > + return PTR_ERR(mtk_dp->regs); > + > + len = of_property_count_elems_of_size(of_node, > + "data-lanes", > sizeof(u32)); > + if (len < 0 || len > 4 || len == 3) { > + dev_err(dev, "invalid data lane size: %d\n", len); > + return -EINVAL; > + } > + > + mtk_dp->max_lanes = len; > + > + ret = device_property_read_u32(dev, "max-linkrate-mhz", > &linkrate); > + if (ret) { > + dev_err(dev, "failed to read max linkrate: %d\n", ret); > + return ret; > + } > + > + switch (linkrate) { > + case 8100: /* 8.1G */ > + mtk_dp->max_linkrate = DP_LINK_BW_8_1; > + break; > + case 5400: /* 5.4G */ > + mtk_dp->max_linkrate = DP_LINK_BW_5_4; > + break; > + case 2700: /* 2.7G */ > + mtk_dp->max_linkrate = DP_LINK_BW_2_7; > + break; > + case 1620: /* 1.62G */ > + mtk_dp->max_linkrate = DP_LINK_BW_1_62; > + break; > + default: > + dev_err(dev, "invalid linkrate: %d\n", linkrate); > + return -EINVAL; > + } Use drm_dp_link_rate_to_bw_code() instead of self-implementation. Regards, CK > + > + return 0; > +} > +