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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id d28-20020ac2545c000000b004f266537ad7sm101199lfn.34.2023.06.02.02.16.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 Jun 2023 02:16:38 -0700 (PDT) Message-ID: <52e16dae-153d-f1ef-53ca-bb637bde58b6@linaro.org> Date: Fri, 2 Jun 2023 11:16:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH RFC 5/7] arm64: dts: qcom: sm8550: add ports subnodes in usb/dp qmpphy node Content-Language: en-US To: Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Heikki Krogerus , Greg Kroah-Hartman Cc: Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org References: <20230601-topic-sm8550-upstream-type-c-v1-0-d4d97b4d8bab@linaro.org> <20230601-topic-sm8550-upstream-type-c-v1-5-d4d97b4d8bab@linaro.org> From: Konrad Dybcio In-Reply-To: <20230601-topic-sm8550-upstream-type-c-v1-5-d4d97b4d8bab@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1.06.2023 16:07, Neil Armstrong wrote: > Add the USB3+DP Combo QMP PHY port subnodes in the SM8550 SoC DTSI > to avoid duplication in the devices DTs. > > Signed-off-by: Neil Armstrong > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sm8550.dtsi | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index b41b3981b3ce..ca2280041f83 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -2838,6 +2838,32 @@ usb_dp_qmpphy: phy@88e8000 { > #phy-cells = <1>; > > status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + usb_dp_qmpphy_out: endpoint { > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + usb_dp_qmpphy_usb_ss_in: endpoint { > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + usb_dp_qmpphy_dp_in: endpoint { > + }; > + }; > + }; > }; > > usb_1: usb@a6f8800 { >