From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C88DC43A1D for ; Thu, 12 Jul 2018 10:11:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C1CB720C0C for ; Thu, 12 Jul 2018 10:11:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C1CB720C0C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726768AbeGLKUM (ORCPT ); Thu, 12 Jul 2018 06:20:12 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16143 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726401AbeGLKUL (ORCPT ); Thu, 12 Jul 2018 06:20:11 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1, AES128-SHA) id ; Thu, 12 Jul 2018 03:11:15 -0700 Received: from HQMAIL101.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 12 Jul 2018 03:11:18 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 12 Jul 2018 03:11:18 -0700 Received: from [10.21.132.122] (10.124.1.5) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 12 Jul 2018 10:11:16 +0000 Subject: Re: [PATCH v5 1/4] clk: tegra: Fix includes required by fence_udelay() To: Aapo Vienamo , Peter De Schrijver CC: Prashant Gaikwad , Michael Turquette , Stephen Boyd , Thierry Reding , , , References: <1531319965-19689-1-git-send-email-avienamo@nvidia.com> <1531319965-19689-2-git-send-email-avienamo@nvidia.com> From: Jon Hunter Message-ID: <5332f15c-65ae-5a70-577f-6125715233e6@nvidia.com> Date: Thu, 12 Jul 2018 11:11:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <1531319965-19689-2-git-send-email-avienamo@nvidia.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL104.nvidia.com (172.18.146.11) To HQMAIL101.nvidia.com (172.20.187.10) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/07/18 15:39, Aapo Vienamo wrote: > Add the missing linux/delay.h include statement for udelay() used by > fence_udelay() macro. > > Signed-off-by: Aapo Vienamo > Acked-by: Peter De Schrijver > --- > drivers/clk/tegra/clk.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h > index e1f8846..e3b9c22 100644 > --- a/drivers/clk/tegra/clk.h > +++ b/drivers/clk/tegra/clk.h > @@ -19,6 +19,7 @@ > > #include > #include > +#include > > /** > * struct tegra_clk_sync_source - external clock source from codec Acked-by: Jon Hunter Cheers Jon -- nvpublic