From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73786C43219 for ; Fri, 26 Apr 2019 17:40:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 45FA7206C1 for ; Fri, 26 Apr 2019 17:40:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726255AbfDZRkR (ORCPT ); Fri, 26 Apr 2019 13:40:17 -0400 Received: from goliath.siemens.de ([192.35.17.28]:52927 "EHLO goliath.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726053AbfDZRkQ (ORCPT ); Fri, 26 Apr 2019 13:40:16 -0400 Received: from mail1.sbs.de (mail1.sbs.de [192.129.41.35]) by goliath.siemens.de (8.15.2/8.15.2) with ESMTPS id x3QHdxXO016348 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 26 Apr 2019 19:39:59 +0200 Received: from [167.87.22.130] ([167.87.22.130]) by mail1.sbs.de (8.15.2/8.15.2) with ESMTP id x3QHdvop028638; Fri, 26 Apr 2019 19:39:57 +0200 Subject: Re: [PATCH 2/2] gpio: sch: Add interrupt support To: Manivannan Sadhasivam , Andy Shevchenko Cc: "Enrico Weigelt, metux IT consult" , Andy Shevchenko , Mika Westerberg , Linus Walleij , Bartosz Golaszewski , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , ACPI Devel Maling List , "Rafael J. Wysocki" References: <292e6eff-82cc-6e4d-925b-77a60399e2e0@siemens.com> <20190424100130.GB2654@lahna.fi.intel.com> <1200464b-f969-ebc2-ae82-1f8ca98aaca1@siemens.com> <20190424103306.GC2654@lahna.fi.intel.com> <9377620b-d74a-04d9-a51e-8590400b1c0f@siemens.com> <20190426130615.GT9224@smile.fi.intel.com> <2f3da791-4a10-c2c4-dc5a-22ad16ed7be6@siemens.com> <20190426173329.GA31161@Mani-XPS-13-9360> From: Jan Kiszka Message-ID: <534a4812-e6d3-9b16-5142-ab214da3d661@siemens.com> Date: Fri, 26 Apr 2019 19:39:56 +0200 User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 MIME-Version: 1.0 In-Reply-To: <20190426173329.GA31161@Mani-XPS-13-9360> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 26.04.19 19:33, Manivannan Sadhasivam wrote: > On Fri, Apr 26, 2019 at 08:20:19PM +0300, Andy Shevchenko wrote: >> On Fri, Apr 26, 2019 at 7:05 PM Jan Kiszka wrote: >>> >>> On 26.04.19 16:42, Enrico Weigelt, metux IT consult wrote: >>>> On 26.04.19 15:36, Jan Kiszka wrote: >>>> >>>>> At the same time, there are no real alternatives - to my> knowledge - for the value it brings (various bindings) to simply >>>> switch> the engine. >>>> Which value exactly does that collection of crude wrappers and broken >>>> attempts to buypass the kernel (driving gpios via /dev/mem *facepalm*) >>>> provide ? >>> >>> Leaving that blunt hack aside: >>> >>> import mraa >>> >>> pin = mraa.Gpio(13) >>> pin.dir(mraa.DIR_OUT) >>> pin.write(1) >>> >>> And the same goes for nodejs, java and c++. >>> >>> Moreover, this allows you to abstract away where "Pin 13" actually came from on >>> that board if the kernel changes (BSP -> upstream...) or the extension board or >>> ... >> >> The problem here is opaque number. This has to be chip + *relative* pin number/ >> See this: >> https://stackoverflow.com/questions/55532410/how-do-linux-gpio-numbers-get-their-values/55579640#55579640 >> > > But for platform like 96Boards we don't need controller specific lookup, these > are all handled by the platform code [1] so that the users can use the standard > pinout number to access GPIOs. For instance, pin 23 on the Low Speed expansion > header is the GPIO for all 96Boards platform, so the user can access that pin > using 23 itself in the application and it will run across all supported > 96Boards. Can you ensure stable numbering when probing order changes, e.g. due to adding an extension board? Jan > > That's one of the reason why we prefer MRAA. > > Thanks, > Mani > > [1] https://github.com/intel-iot-devkit/mraa/blob/master/src/arm/96boards.c#L75 > >> -- >> With Best Regards, >> Andy Shevchenko -- Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence Center Embedded Linux