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Wed, 11 Feb 2026 08:10:35 -0800 (PST) X-Received: by 2002:a05:6a21:478a:b0:38d:7d8e:5062 with SMTP id adf61e73a8af0-394322dec17mr2632247637.34.1770826235179; Wed, 11 Feb 2026 08:10:35 -0800 (PST) Received: from [192.168.1.8] ([122.177.240.40]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ab2984ad84sm28188315ad.5.2026.02.11.08.10.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Feb 2026 08:10:34 -0800 (PST) Message-ID: <53c051f3-3a72-4d8d-917e-3b9d1537443e@oss.qualcomm.com> Date: Wed, 11 Feb 2026 21:40:29 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iommu/arm-smmu: Use pm_runtime in fault handlers To: Pranjal Shrivastava Cc: Robin Murphy , Will Deacon , Joerg Roedel , Rob Clark , Connor Abbott , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Akhil P Oommen , Pratyush Brahma References: <20260127-smmu-rpm-v1-1-2ef2f4c85305@oss.qualcomm.com> <9fb8f661-a235-4f86-bc10-f80a21a8fa9d@arm.com> <00fcbcf2-3f48-410d-88a3-88dc834c1ed7@oss.qualcomm.com> <7720d215-9f92-4f0f-83af-c992e1cbe531@oss.qualcomm.com> From: Prakash Gupta Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=H+XWAuYi c=1 sm=1 tr=0 ts=698ca9fd cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=AriDp7QaH+PBGn1cKZtmxA==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=VwQbUJbxAAAA:8 a=1XWaLZrsAAAA:8 a=2sq3q3wKjKmezesidpQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjExMDEyNCBTYWx0ZWRfXydGYSahN5/ng NjgewogQ3X0NFN7Hb/1GxiYlnLapP0wXWIsmB4pCygBPaOlby48VdOGuEX2zuuT11FbUeph3Zpk 8hM0WsF+lrx0R5mDLrERpuSDrlYfXdkzD9l/5mdXKz3t9ShF4RlJ7o6NlyQClhmvwq3/2HyLY/b 1pP1j94sZeNIffXnMUJJ77PVDGger37QUHGizJQ9ALnV0JZr6BFrjsN2RHeJn5XGBrQuks5Xd1i jnnGcHcJqTqh9CUatTp3KV0X6zWOwfqn89rRKEjh/FLzmrBVRizu1QGCyXDOjNlMFevgzYYsrqM LcDUe7ftEW498ChtjbqereAVtIMpo6EGcoioulcNc/67YF0RwuihQWJJGA2ssb4Uw2RS7ONwHDp tb8Zw6s0yVKJ/N9Oj0OmBrW+b+39Vf3QP68o1HbW9dxNpqL1WqhXtpavHgzr7b03Fkt49CynM5B faPOZwJUITsqQKSSgsw== X-Proofpoint-GUID: WKexUfZi9kjaOOwMfzc_9h7F-yB7CsJz X-Proofpoint-ORIG-GUID: WKexUfZi9kjaOOwMfzc_9h7F-yB7CsJz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-11_02,2026-02-11_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602110124 On 2/10/2026 6:45 PM, Pranjal Shrivastava wrote: > On Tue, Feb 10, 2026 at 04:39:56PM +0530, Prakash Gupta wrote: >> >> >> On 2/3/2026 1:44 AM, Pranjal Shrivastava wrote: >>> On Wed, Jan 28, 2026 at 06:44:35PM +0000, Robin Murphy wrote: >>>> [ +Pranjal as this might matter for v3 too... ] >>>> >>> >>> Hi Robin, >>> >>> To weigh in from the arm-smmu-v3 side, we’ve attempted to address the >>> "can of worms" regarding power races by leaning on these differences: >>> >>> - Threaded IRQs for PRI/Events: In the recent series[1], the PRI and >>> event handlers are fully threaded. This allows us to call >>> arm_smmu_rpm_get() safely, as the handler can sleep while waiting for >>> the hardware to resume. >>> >>> - GERROR Handling: Since GERROR remains a hard IRQ, we handle any >>> pending gerrors in the suspend callback before the SMMU actually >>> powers down. Any GERROR interrupts received while the device was >>> suspended are treated as spurious and ignored. >>> >>> Thanks, >>> Praan >> >> [1] refer to case where SMMU state is not retained during smmu device >> power down, this I think is equally applicable for both context and >> global faults. >> >> Since the ARM SMMU runtime resume triggers a device reset, any pending >> faults would be cleared during resume. Here the solution can be to >> handle both global and context faults before allowing the SMMU device to >> suspend. >> With this approach, any hard or threaded IRQ scheduled after the SMMU >> device has suspended can be safely ignored. >> One concern I see is iommu fault reporting to clients while handling >> fault during smmu device suspend. > > I believe by the time we've reached suspend it's safe to assume that all > clients have been suspended. Thus, we could simply not report the error > and instead scream by having a dev_warn_ratelimited about the situation. > By reporting error I meant reporting the error to client with report_iommu_fault(). I agree that if smmu device is being suspended the dma devices should have suspended by now. If so, it should be safe to just handle the fault excluding report_iommu_fault() in suspend path and complete smmu device suspend. Will update in next patchset. > Thanks, > Praan > >> >> Thanks, >> Prakash >> >> [1] https://lore.kernel.org/all/20260126151157.3418145-9-praan@google.com/ >>