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[130.180.211.218]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48c71c0b60fsm5679687f8f.8.2026.10.07.07.36.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 07 Oct 2026 07:36:26 -0700 (PDT) Message-ID: <5439d103-cfcf-4fa0-ae8b-32417e30ae95@oss.qualcomm.com> Date: Wed, 7 Oct 2026 16:36:10 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Subject: Re: [PATCH v2 0/2] Add bus clock for t7-thermal sensor To: linux-kernel-dev@aliel.fr, Guillaume La Roque , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Conor Dooley , linux-pm@vger.kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski References: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA3MDA1OCBTYWx0ZWRfX7Lnz8kCLU19+ cIeeWlL6Gj5uvFrNvp4ix7mkPSc9e4IiGXY5JvKTkP8YjebUhwI9qNXYxLgKQSdKzaW/7UB1BZt D6rSsxCTEPWKPx1CNcQ1kmU7cPiwTWM= X-Authority-Analysis: v=2.4 cv=J4I/fwnS c=1 sm=1 tr=0 ts=6ac658ed cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=uw/3876vWhRnNVL35W6mqQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=z_e_Sa1Ot6aGCMGJufgA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-ORIG-GUID: ESFqdKwHhLy9U8fNAkElqsRmpAEzzvdS X-Proofpoint-GUID: ESFqdKwHhLy9U8fNAkElqsRmpAEzzvdS X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA3MDA1OCBTYWx0ZWRfX4TEIx3MbM3DO g44urhXid36+jwN6XqSHUTUcqZfhDC4LfPgKpBERywhh9uaxtt5pSSFnEAiI53fhzlWbQChqlfY w4ZLCZaLbbNZivfp52Uyn3dISJhjxWMQY7onaHhnwI/4lLXsH7dd/figC5u2ZPgAnVq83sVfEw9 kyBA3L49H4+N6MEcFk4KeT5eBD4e9vlaSYo97apnhCAm3Vn1oYZjOKpvmwAEJQYyrlam9UEjgOk qwZrYJWb5I6laf58PX/8lv50gLe1HYPf0Y3bSwuyc526bqc4W5kpMwrIq7dNcLV9/vmU21GXm+N /MmkIykPiKfQMkQ5vGsKM8ITWl9TypksiaMwzVxcJjsyTOJDUlno4ZOQk2apQd4xFKXHSGMc3Xz yUVb1Ieyz5okbHXvGP+wn7yENY/7rCxUKytq5lJUzNmEOyfUCIin/fHk56s0/DYeyPESsFani/w IE2nCjvYdu0Z4ktyxRA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-07_04,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 phishscore=0 clxscore=1015 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610070058 On 9/23/26 16:37, Ronald Claveau via B4 Relay wrote: > The t7 thermal sensor requires a bus clock, gating register access to > the sensor, in addition to the functional clock that is already > described and shared between sensors on other Amlogic SoCs. > > This series first extends the devicetree binding to describe this > second clock, making it mandatory only for the t7-thermal compatible > so other SoCs are unaffected, then updates the driver to use the > clk_bulk API instead of a single struct clk, so it can transparently > handle however many clocks a given compatible declares. > > `dt_binding_check DT_SCHEMA_FILES=amlogic,thermal.yaml` is ok > > CHKDT ./Documentation/devicetree/bindings > warning: python package 'yamllint' not installed, skipping > STYLE ./Documentation/devicetree/bindings > DTEX Documentation/devicetree/bindings/thermal/amlogic,thermal.example.dts > DTC [C] Documentation/devicetree/bindings/thermal/amlogic,thermal.example.dtb > > Signed-off-by: Ronald Claveau > --- Applied, thanks