Re: [PATCH] PCI: Do not enable async suspend for JMicron chips

[Barto <mister.freeman@laposte.net>]

I tried the patch, it solves the problem,

but I had to change the patch in order to be compatible with 3.18rc3
source code :

patching file drivers/pci/pci.c
Hunk #1 FAILED at 2046.
1 out of 1 hunk FAILED -- saving rejects to file drivers/pci/pci.c.rej

here is the correct patch for kernel 3.18rc3 source code :

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2046,7 +2046,17 @@ void pci_pm_init(struct pci_dev *dev)
 	pm_runtime_forbid(&dev->dev);
 	pm_runtime_set_active(&dev->dev);
 	pm_runtime_enable(&dev->dev);
-	device_enable_async_suspend(&dev->dev);
+	
+     /*
+      * The JMicron chip 361/363/368 contains one SATA controller and
+      * one PATA controller, they are brother-relation ship in PCI tree,
+      * but for powering on these both controller, we must follow the
+      * sequence one by one, otherwise one of them can not be powered on
+      * successfully, so here we disable the async suspend method for
+      * Jmicron chip.
+      */
+     if (dev->vendor != PCI_VENDOR_ID_JMICRON)
+         device_enable_async_suspend(&dev->dev);
 	dev->wakeup_prepared = false;

 	dev->pm_cap = 0;


Le 05/11/2014 17:31, Tejun Heo a écrit :
> On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
>> The JMicron chip 361/363/368 contains one SATA controller and
>> one PATA controller, they are brother-relation ship in PCI tree,
>> but for powering on these both controller, we must follow the
>> sequence one by one, otherwise one of them can not be powered on
>> successfully.
>>
>> So here we disable the async suspend method for Jmicron chip.
>>
>> Cc: stable@vger.kernel.org # 3.15+
>> Signed-off-by: Chuansheng Liu <chuansheng.liu@intel.com>
> 
> Applied to libata/for-3.18-fixes.
> 
> Thanks.
>