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Thu, 21 May 2026 06:54:08 -0700 (PDT) Received: from [192.168.88.32] ([169.155.232.242]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eaa9358d0sm2825864f8f.26.2026.05.21.06.54.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 May 2026 06:54:08 -0700 (PDT) Message-ID: <545dd8a4-662b-49de-a5cf-793d20989571@redhat.com> Date: Thu, 21 May 2026 15:54:06 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2 net 1/2] net: hibmcge: disable Relaxed Ordering to fix RX packet corruption To: Jijie Shao , davem@davemloft.net, edumazet@google.com, kuba@kernel.org, andrew+netdev@lunn.ch, horms@kernel.org Cc: shenjian15@huawei.com, liuyonglong@huawei.com, chenhao418@huawei.com, huangdonghua3@h-partners.com, yangshuaisong@h-partners.com, shiyongbang@huawei.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260518144253.1568118-1-shaojijie@huawei.com> <20260518144253.1568118-2-shaojijie@huawei.com> Content-Language: en-US From: Paolo Abeni In-Reply-To: <20260518144253.1568118-2-shaojijie@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 5/18/26 4:42 PM, Jijie Shao wrote: > When SMMU is disabled, the hibmcge driver may receive corrupted packets. > The hardware writes packet data and descriptors to the same page, but > with Relaxed Ordering enabled, PCI write transactions may not be > strictly ordered. This can cause the driver to observe a valid > descriptor before the corresponding packet data is fully written. > > Fix this by clearing PCI_EXP_DEVCTL_RELAX_EN in the PCI bridge control > register to ensure strict write ordering between packet data and > descriptors. > > Fixes: f72e25594061 ("net: hibmcge: Implement rx_poll function to receive packets") > Signed-off-by: Jijie Shao > --- > drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c > index 068da2fd1fea..319551caf047 100644 > --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c > +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c > @@ -420,6 +420,8 @@ static int hbg_pci_init(struct pci_dev *pdev) > return -ENOMEM; > > pci_set_master(pdev); > + pcie_capability_clear_word(pdev, PCI_EXP_DEVCTL, > + PCI_EXP_DEVCTL_RELAX_EN); Sashiko noted this will not survive a device reset - that performs pci_restore_state - and you should likelly call pci_save_state(pdev) afterwards. /P