From: Jiang Liu <jiang.liu@linux.intel.com>
To: "Yun Wu (Abel)" <wuyun.wu@huawei.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Grant Likely <grant.likely@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Yingjoe Chen <yingjoe.chen@mediatek.com>,
Yijing Wang <wangyijing@huawei.com>
Subject: Re: [patch 04/16] genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip
Date: Tue, 18 Nov 2014 21:25:35 +0800 [thread overview]
Message-ID: <546B48CF.50100@linux.intel.com> (raw)
In-Reply-To: <546B46C0.6070904@huawei.com>
On 2014/11/18 21:16, Yun Wu (Abel) wrote:
> On 2014/11/18 20:43, Jiang Liu wrote:
>
>> On 2014/11/18 19:47, Yun Wu (Abel) wrote:
>>> On 2014/11/18 18:02, Thomas Gleixner wrote:
>>>
>>>> On Tue, 18 Nov 2014, Yun Wu (Abel) wrote:
>>>>> On 2014/11/12 21:42, Thomas Gleixner wrote:
>>>>>> +int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
>>>>>> +{
>>>>>> + struct irq_data *pos = NULL;
>>>>>> +
>>>>>> +#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
>>>>>> + for (; data; data = data->parent_data)
>>>>>> +#endif
>>>>>> + if (data->chip && data->chip->irq_compose_msi_msg)
>>>>>> + pos = data;
>>>>>> + if (!pos)
>>>>>> + return -ENOSYS;
>>>>>> +
>>>>>> + pos->chip->irq_compose_msi_msg(pos, msg);
>>>>>> +
>>>>>> + return 0;
>>>>>> +}
>>>>>
>>>>> Adding message composing routine to struct irq_chip is OK to me, and it should
>>>>> be because it is interrupt controllers' duty to compose messages (so that they
>>>>> can parse the messages correctly without any pre-defined rules that endpoint
>>>>> devices absolutely need not to know).
>>>>> However a problem comes out when deciding which parameters should be passed to
>>>>> this routine. A message can associate with multiple interrupts, which makes me
>>>>> think composing messages for each interrupt is not that appropriate. And we
>>>>> can take a look at the new routine irq_chip_compose_msi_msg(). It is called by
>>>>> msi_domain_activate() which will be called by irq_domain_activate_irq() in
>>>>> irq_startup() for each interrupt descriptor, result in composing a message for
>>>>> each interrupt, right? (Unless requiring a judge on the parameter @data when
>>>>> implementing the irq_compose_msi_msg() callback that only compose message for
>>>>> the first entry of that message. But I really don't like that...)
>>>>
>>>> No, that's not correct. You are looking at some random stale version
>>>> of this. The current state of affairs is in
>>>>
>>>> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/irqdomain
>>>>
>>>> See also https://lkml.org/lkml/2014/11/17/764
>>>>
>>>> In activate we write the message, which is the right point to do so.
>>>>
>>>
>>> I checked the current state, it seems to be the same.
>>> Yes, the decision of postponing the actual hardware programming to the point
>>> where the interrupt actually gets used is right, but here above I was talking
>>> another thing.
>>> As I mentioned, a message can associate with multiple interrupts. Enabling
>>> any of them will call irq_startup(). So if we don't want to compose or write
>>> messages repeatedly, we'd better require performing some checks before
>>> activating the interrupts.
>> Hi Yun,
>> Seems you are talking about the case of multiple MSI support.
>> Yes, we have special treatment for multiple MSI, which only writes PCI
>> MSI registers when starting up the first MSI interrupt.
>> void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg
>> *msg)
>> {
>> struct msi_desc *desc = irq_data->msi_desc;
>>
>> /*
>> * For MSI-X desc->irq is always equal to irq_data->irq. For
>> * MSI only the first interrupt of MULTI MSI passes the test.
>> */
>> if (desc->irq == irq_data->irq)
>> __pci_write_msi_msg(desc, msg);
>> }
>
>
> Yes, I picked the case of multiple MSI support.
> The check should also be performed when composing messages. That's why
> I don't like its parameters. The @data only indicates one interrupt,
> while I prefer doing compose/write in the unit of message descriptor.
Hi Yun,
The common abstraction is that every message interrupt could be
controlled independently, so have compose_msi_msg()/write_msi_msg() per
interrupt. MSI is abstracted as an special message signaled interrupt
with hardware limitation where multiple interrupts sharing the same
hardware registers. So we filter in pci_msi_domain_write_msg(). On the
other handle, the generic MSI framework caches msi_msg in msi_desc,
so we don't filter compose_msi_msg().
Regards!
Gerry
next prev parent reply other threads:[~2014-11-18 13:25 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-12 13:42 [patch 00/16] genirq: Hierarchical irq domains and generic MSI interrupt code Thomas Gleixner
2014-11-12 13:42 ` [patch 01/16] irqdomain: Introduce new interfaces to support hierarchy irqdomains Thomas Gleixner
2014-11-18 9:24 ` Yun Wu (Abel)
2014-11-18 9:54 ` Thomas Gleixner
2014-11-18 11:48 ` Yun Wu (Abel)
2014-11-24 12:33 ` Yun Wu (Abel)
2014-11-24 13:13 ` Thomas Gleixner
2014-11-24 14:01 ` Yun Wu (Abel)
2014-11-24 14:11 ` Jiang Liu
2014-11-24 14:19 ` Yun Wu (Abel)
2014-11-24 14:33 ` Jiang Liu
2014-11-24 14:46 ` Yun Wu (Abel)
2014-11-24 14:32 ` Thomas Gleixner
2014-11-24 14:45 ` Yun Wu (Abel)
2014-11-12 13:42 ` [patch 02/16] irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF Thomas Gleixner
2014-11-12 13:42 ` [patch 03/16] genirq: Introduce helper functions to support stacked irq_chip Thomas Gleixner
2014-11-12 13:42 ` [patch 04/16] genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip Thomas Gleixner
2014-11-18 9:26 ` Yun Wu (Abel)
2014-11-18 10:02 ` Thomas Gleixner
2014-11-18 11:47 ` Yun Wu (Abel)
2014-11-18 12:43 ` Jiang Liu
2014-11-18 13:16 ` Yun Wu (Abel)
2014-11-18 13:25 ` Jiang Liu [this message]
2014-11-18 13:48 ` Yun Wu (Abel)
2014-11-18 13:55 ` Jiang Liu
2014-11-18 14:03 ` Yun Wu (Abel)
2014-11-18 14:06 ` Jiang Liu
2014-11-12 13:42 ` [patch 05/16] genirq: Add IRQ_SET_MASK_OK_DONE " Thomas Gleixner
2014-11-12 13:43 ` [patch 06/16] genirq: Split out flow handler typedefs into seperate header file Thomas Gleixner
2014-11-12 13:43 ` [patch 07/16] genirq: Introduce helper irq_domain_set_info() to reduce duplicated code Thomas Gleixner
2014-11-13 9:57 ` Yingjoe Chen
2014-11-13 10:00 ` Jiang Liu
2014-11-13 10:48 ` Marc Zyngier
2014-11-14 15:31 ` Marc Zyngier
2014-11-14 15:41 ` Jiang Liu
2014-11-14 17:35 ` Marc Zyngier
2014-11-15 1:26 ` Jiang Liu
2014-11-18 9:26 ` Yun Wu (Abel)
2014-11-18 10:03 ` Thomas Gleixner
2014-11-18 11:47 ` Yun Wu (Abel)
2014-11-18 12:38 ` Jiang Liu
2014-11-18 13:28 ` Yun Wu (Abel)
2014-11-18 13:37 ` Jiang Liu
2014-11-12 13:43 ` [patch 08/16] genirq: Introduce callback irq_chip.irq_write_msi_msg Thomas Gleixner
2014-11-18 9:26 ` Yun Wu (Abel)
2014-11-18 10:19 ` Thomas Gleixner
2014-11-18 13:33 ` Yun Wu (Abel)
2014-11-18 13:43 ` Jiang Liu
2014-11-18 13:52 ` Yun Wu (Abel)
2014-11-18 14:03 ` Jiang Liu
2014-11-18 14:15 ` Jiang Liu
2014-11-18 14:22 ` Yun Wu (Abel)
2014-11-18 14:29 ` Jiang Liu
2014-11-18 14:46 ` Yun Wu (Abel)
2014-11-18 17:14 ` Marc Zyngier
2014-11-19 3:38 ` Yun Wu (Abel)
2014-11-19 8:55 ` Marc Zyngier
2014-11-18 14:32 ` Thomas Gleixner
2014-11-19 6:57 ` Yun Wu (Abel)
2014-11-19 8:02 ` Jiang Liu
2014-11-19 9:20 ` Marc Zyngier
2014-12-10 9:26 ` Yun Wu (Abel)
2014-11-18 14:19 ` Thomas Gleixner
2014-11-18 14:34 ` Yun Wu (Abel)
2014-11-18 14:52 ` Jiang Liu
2014-11-19 3:47 ` Yun Wu (Abel)
2014-11-19 11:09 ` Thomas Gleixner
2014-11-18 17:21 ` Marc Zyngier
2014-11-19 3:40 ` Yun Wu (Abel)
2014-11-19 11:11 ` Thomas Gleixner
2014-12-10 9:11 ` Yun Wu (Abel)
2014-12-10 10:25 ` Thomas Gleixner
2014-12-11 3:01 ` Yun Wu (Abel)
2014-11-18 13:51 ` Jiang Liu
2014-11-12 13:43 ` [patch 09/16] genirq: Add generic msi irq domain support Thomas Gleixner
2014-11-18 12:07 ` Yun Wu (Abel)
2014-11-18 12:49 ` Jiang Liu
2014-11-18 13:55 ` Yun Wu (Abel)
2014-11-18 14:24 ` Thomas Gleixner
2014-11-18 14:39 ` Yun Wu (Abel)
2014-11-20 2:29 ` Jiang Liu
2014-11-12 13:43 ` [patch 10/16] PCI/MSI: Move cached entry functions to irq core Thomas Gleixner
2014-11-12 13:43 ` [patch 11/16] PCI/MSI: Remove unnecessary braces around single statements Thomas Gleixner
2014-11-12 13:43 ` [patch 12/16] PCI/MSI: Simplify PCI MSI code by initializing msi_desc.nvec_used earlier Thomas Gleixner
2014-11-12 13:43 ` [patch 13/16] PCI/MSI: Kill redundant call of irq_set_msi_desc() for MSI-X interrupts Thomas Gleixner
2014-11-12 13:43 ` [patch 14/16] PCI/MSI: Rename __read_msi_msg() to __pci_read_msi_msg() Thomas Gleixner
2014-11-12 13:43 ` [patch 15/16] PCI/MSI: Rename write_msi_msg() to pci_write_msi_msg() Thomas Gleixner
2014-11-12 16:50 ` Jiang Liu
2014-11-12 13:43 ` [patch 16/16] PCI/MSI: Enhance core to support hierarchy irqdomain Thomas Gleixner
2014-11-12 15:29 ` Marc Zyngier
2014-11-12 16:43 ` Thomas Gleixner
2014-11-12 14:13 ` [patch 00/16] genirq: Hierarchical irq domains and generic MSI interrupt code Yingjoe Chen
2014-11-12 14:48 ` Thomas Gleixner
2014-11-18 9:24 ` Yun Wu (Abel)
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