From: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Dave Hansen <dave.hansen@linux.intel.com>
Subject: Re: [PATCH 3.19 v4 2/2] x86: Enforce maximum instruction size in the instruction decoder
Date: Thu, 15 Jan 2015 21:37:48 +0900 [thread overview]
Message-ID: <54B7B49C.90003@hitachi.com> (raw)
In-Reply-To: <6ceb805aba0291431f19f72d7f2e765f3a0a9fcf.1421183147.git.luto@amacapital.net>
(2015/01/14 6:49), Andy Lutomirski wrote:
> x86 instructions cannot exceed 15 bytes, and the instruction decoder
> should enforce that. Prior to 6ba48ff46f76, the instruction length
> limit was implicitly set to 16, which was an approximation of 15,
> but there is currently no limit at all.
>
> Fix the decoder to reject instructions that exceed 15 bytes.
> A subsequent patch (targetted for 3.20) will fix MAX_INSN_SIZE.
Hmm, is there any problem to just change MAX_INSN_SIZE to 15?
> Other than potentially confusing some of the decoder sanity checks,
> I'm not aware of any actual problems that omitting this check would
> cause.
>
> Fixes: 6ba48ff46f76 x86: Remove arbitrary instruction size limit in instruction decoder
> Signed-off-by: Andy Lutomirski <luto@amacapital.net>
> ---
> arch/x86/lib/insn.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c
> index 2480978b31cc..7b80745d2c5a 100644
> --- a/arch/x86/lib/insn.c
> +++ b/arch/x86/lib/insn.c
> @@ -52,6 +52,13 @@
> */
> void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64)
> {
> + /*
> + * Instructions longer than 15 bytes are invalid even if the
> + * input buffer is long enough to hold them.
> + */
> + if (buf_len > 15)
> + buf_len = 15;
> +
Without changing the MAX_INSN_SIZE, this looks very odd, since all other
code suppose that the max length of an instruction is 16 (MAX_INSN_SIZE)
except here.
Thank you,
> memset(insn, 0, sizeof(*insn));
> insn->kaddr = kaddr;
> insn->end_kaddr = kaddr + buf_len;
>
--
Masami HIRAMATSU
Software Platform Research Dept. Linux Technology Research Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt@hitachi.com
next prev parent reply other threads:[~2015-01-15 12:37 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-13 21:49 [PATCH 3.19 v4 0/2] x86, mpx: Instruction decoder fixes and hardening Andy Lutomirski
2015-01-13 21:49 ` [PATCH 3.19 v4 1/2] x86, mpx: Short-circuit the instruction decoder for unexpected opcodes Andy Lutomirski
2015-01-20 13:59 ` Thomas Gleixner
2015-01-20 22:28 ` Andy Lutomirski
2015-01-13 21:49 ` [PATCH 3.19 v4 2/2] x86: Enforce maximum instruction size in the instruction decoder Andy Lutomirski
2015-01-15 12:37 ` Masami Hiramatsu [this message]
2015-01-15 15:22 ` Andy Lutomirski
2015-01-16 1:02 ` Masami Hiramatsu
2015-01-27 23:56 ` Andy Lutomirski
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