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Mon, 26 Jan 2026 18:13:45 -0800 (PST) X-Received: by 2002:a17:903:2344:b0:297:e3c4:b2b0 with SMTP id d9443c01a7336-2a870df545bmr2164465ad.54.1769480025011; Mon, 26 Jan 2026 18:13:45 -0800 (PST) Received: from [10.239.133.242] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a802daa66asm98956485ad.9.2026.01.26.18.13.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Jan 2026 18:13:44 -0800 (PST) Message-ID: <54e3a23e-6426-445b-b5e4-43d727b88709@oss.qualcomm.com> Date: Tue, 27 Jan 2026 10:13:36 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 2/7] qcom-tgu: Add TGU driver To: Konrad Dybcio , andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org References: <20260109021141.3778421-1-songwei.chai@oss.qualcomm.com> <20260109021141.3778421-3-songwei.chai@oss.qualcomm.com> Content-Language: en-US From: Songwei Chai In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: AGpTpzwjaJPegNCC_etm9saVOvSGBZri X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDAxNyBTYWx0ZWRfX5mZtLj3dngW+ 1g+QGEzoTYMbtWGXKUQyB881SUSQ/QYE09ZxHMxbO7Ax1wpr1La0HVBP58wIU+Ww/nBs3swl9qp sEgy0yGXXeritatAmcsGCtk74N5STlygtyVESaCWmXJyPqT8331o+edEHQBTQPEvPcJjP+usRn6 E+mr9mb/KFANc69kn702nh08k0a+t+YZY51q3E10TPUzPKYOptqacbfo7L5w8hximfoaE8woYu7 yU1B/+vW6kIosMaQJfeM54v1t17cedUHImgtVBz+2Gr03d2nDUL8s61TXQ3+rdHsMfrPLpBtroD ofDMZB5U3+jrmThf0NI/V1BGvK59JSBqtNPI9KGrWhWKpRGs9+F1N6j0R+26EWSf23zA4+rymHt 1Zl1LQzDfGtGrJGKu1WsZccxav5Vxq+YMDQrHxeq3xHz7qXzCv+k1pLizrHVQuHA626/hrEfdRG vHPCx5peWa37nOajzsQ== X-Proofpoint-GUID: AGpTpzwjaJPegNCC_etm9saVOvSGBZri X-Authority-Analysis: v=2.4 cv=AOFXvqQI c=1 sm=1 tr=0 ts=69781f5a cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=w9XZVCsArpARl95_J0UA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-27_01,2026-01-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 phishscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 spamscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270017 Hi Konrad, Sorry for the late reply. On 1/13/2026 6:33 PM, Konrad Dybcio wrote: > On 1/9/26 3:11 AM, Songwei Chai wrote: >> Add driver to support device TGU (Trigger Generation Unit). >> TGU is a Data Engine which can be utilized to sense a plurality of >> signals and create a trigger into the CTI or generate interrupts to >> processors. Add probe/enable/disable functions for tgu. >> >> Signed-off-by: Songwei Chai >> --- > > [...] > >> +static void tgu_disable(struct device *dev) >> +{ >> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); >> + >> + guard(spinlock)(&drvdata->lock); >> + if (drvdata->enable) { > > if (!drvdata->enabled) > return > Marked, will update. > >> + TGU_UNLOCK(drvdata->base); >> + writel(0, drvdata->base + TGU_CONTROL); >> + TGU_LOCK(drvdata->base); >> + >> + drvdata->enable = false; >> + } >> +} >> + >> +static ssize_t enable_tgu_show(struct device *dev, > > 'enabled', in all references to this, please sure. > >> + struct device_attribute *attr, char *buf) >> +{ >> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); >> + bool enabled; >> + >> + guard(spinlock)(&drvdata->lock); >> + enabled = drvdata->enable; >> + >> + return sysfs_emit(buf, "%d\n", enabled ? 1 : 0); > > !!enabled Marked, will update. > > >> +} >> + >> +/* enable_tgu_store - Configure Trace and Gating Unit (TGU) triggers. */ >> +static ssize_t enable_tgu_store(struct device *dev, >> + struct device_attribute *attr, >> + const char *buf, >> + size_t size) >> +{ >> + unsigned long val; >> + int ret = 0; > > Drop the initialization, you override it immediately a line below Sure. > > [...] > >> +static int tgu_probe(struct amba_device *adev, const struct amba_id *id) >> +{ >> + struct device *dev = &adev->dev; >> + struct tgu_drvdata *drvdata; >> + int ret; >> + >> + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); >> + if (!drvdata) >> + return -ENOMEM; >> + >> + drvdata->dev = &adev->dev; >> + dev_set_drvdata(dev, drvdata); >> + >> + drvdata->base = devm_ioremap_resource(dev, &adev->res); >> + if (IS_ERR(drvdata->base)) >> + return PTR_ERR(drvdata->base); >> + >> + spin_lock_init(&drvdata->lock); >> + >> + ret = sysfs_create_groups(&dev->kobj, tgu_attr_groups); >> + if (ret) { >> + dev_err(dev, "failed to create sysfs groups: %d\n", ret); >> + return ret; >> + } >> + >> + drvdata->enable = false; >> + >> + pm_runtime_put(&adev->dev); >> + return 0; > > Please keep a consistent \n above return as you did in all other places > throughout this file Sure. > > [...] > >> +/* Register addresses */ >> +#define TGU_CONTROL 0x0000 >> +#define TGU_LAR 0xfb0 >> +#define TGU_UNLOCK_OFFSET 0xc5acce55 > > Please align the values (it's easier with tabs) > Sure. >> + >> +static inline void TGU_LOCK(void __iomem *addr) >> +{ >> + do { >> + /* Wait for things to settle */ >> + mb(); > > What are we waiting for here? > >> + writel_relaxed(0x0, addr + TGU_LAR); > > If you do a prompt TGU_LOCK()-TGU_UNLOCK() the writes may arrive in > the order opposite to what you want, I'd say this shouldn't be _relaxed() > and we should probably have a readback here to make sure the effect has > taken place immediately > >> + } while (0); >> +} >> + >> +static inline void TGU_UNLOCK(void __iomem *addr) >> +{ >> + do { >> + writel_relaxed(TGU_UNLOCK_OFFSET, addr + TGU_LAR); >> + /* Make sure everyone has seen this */ >> + mb(); > > I believe this should be a readback instead > >> + } while (0); >> +} This lock/unlock sequence is intentionally modelled after the existing CoreSight CS_LOCK/CS_UNLOCK helpers, which have been in mainline for a long time and are widely used on ARM systems. The barriers here are meant to provide CPU-side ordering guarantees around the LAR access rather than to wait for the hardware lock/unlock to complete. In particular, the intent is to prevent configuration accesses from being reordered across the lock/unlock boundary, matching the CoreSight programming model. I agree that the comments may be misleading in that regard, and I can update them to clarify the ordering intent. If you still prefer a stricter write + readback sequence here, I’m also happy to switch to that for additional conservatism. >> + >> +/** >> + * struct tgu_drvdata - Data structure for a TGU (Trigger Generator Unit) >> + * @base: Memory-mapped base address of the TGU device >> + * @dev: Pointer to the associated device structure >> + * @lock: Spinlock for handling concurrent access > > Concurrent access to what? (presumably the TGU?) Concurrent access to private data, such as drvdata->enabled here. I will update the comment to avoid the confusion. > >> + * @enable: Flag indicating whether the TGU device is enabled >> + * >> + * This structure defines the data associated with a TGU device, >> + * including its base address, device pointers, clock, spinlock for >> + * synchronization, trigger data pointers, maximum limits for various >> + * trigger-related parameters, and enable status. >> + */ >> +struct tgu_drvdata { >> + void __iomem *base; >> + struct device *dev; >> + spinlock_t lock; >> + bool enable; > > "enabled", please sure. > > Konrad