From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756118AbbCRXZ4 (ORCPT ); Wed, 18 Mar 2015 19:25:56 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:40532 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753865AbbCRXZy (ORCPT ); Wed, 18 Mar 2015 19:25:54 -0400 Message-ID: <550A097B.7020400@imgtec.com> Date: Wed, 18 Mar 2015 16:25:47 -0700 From: Leonid Yegoshin User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: James Hogan CC: "linux-mips@linux-mips.org" , "wangr@lemote.com" , "peterz@infradead.org" , Qais Yousef , "linux-kernel@vger.kernel.org" , "ralf@linux-mips.org" , "davidlohr@hp.com" , "chenhc@lemote.com" , "manuel.lauss@gmail.com" , "mingo@kernel.org" Subject: Re: [PATCH] MIPS: MSA: misaligned support References: <20150318011630.2702.28882.stgit@ubuntu-yegoshin> <5509611D.80404@imgtec.com> <5509D62B.7030507@imgtec.com> <20150318221248.GB1116@jhogan-linux.le.imgtec.org> In-Reply-To: <20150318221248.GB1116@jhogan-linux.le.imgtec.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.20.3.79] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/18/2015 03:12 PM, James Hogan wrote: > Hi Leonid, > > On Wed, Mar 18, 2015 at 12:46:51PM -0700, Leonid Yegoshin wrote: > >> thread_msa_context_live() == check of TIF_MSA_CTX_LIVE == existence of >> MSA context for thread. >> It differs from MSA is owned by thread, it just says that thread has >> already initialized MSA. >> >> Unfortunate choice of function name, I believe. > Right (I mis-read when its cleared when i grepped). Still, that would > make it even harder to hit since lose_fpu wouldn't clear it, and you > already would've taken an MSA disabled exception first. No, lose_fpu disables MSA now, saves MSA context and switches off TIF_USEDMSA. See 33c771ba5c5d067f85a5a6c4b11047219b5b8f4e, "MIPS: save/disable MSA in lose_fpu". However, a process still has MSA context initialized and it is indicated by TIF_MSA_CTX_LIVE. It should have it before it can get any AdE exception on MSA instruction. > > Anyway, my point was that there's nothing invalid about an unaligned > load being the first MSA instruction. You might use it to load the > initial vector state. No, it is invalid. If MSA is disabled it should trigger "MSA Disabled" exception. Unfortunately, some HW versions had AdE first and it may be logical from some HW point (if access is done before instruction is completely decoded). But that is wrong.