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From: Mark Brown <broonie@kernel.org>
To: "Théo Lebrun" <theo.lebrun@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Vaishnav Achath <vaishnav.a@ti.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
	Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
	Gregory CLEMENT <gregory.clement@bootlin.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Tawfik Bayouk <tawfik.bayouk@mobileye.com>
Subject: Re: [PATCH v2 05/11] spi: cadence-qspi: add FIFO depth detection quirk
Date: Mon, 8 Apr 2024 15:10:28 +0100	[thread overview]
Message-ID: <551bea0a-1c9e-4e04-87db-c643fdaee85e@sirena.org.uk> (raw)
In-Reply-To: <20240405-cdns-qspi-mbly-v2-5-956679866d6d@bootlin.com>

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On Fri, Apr 05, 2024 at 05:02:15PM +0200, Théo Lebrun wrote:

> Use hardware ability to read the FIFO depth thanks to
> CQSPI_REG_SRAMPARTITION that is partially read-only. Keep current
> behavior identical for existing compatibles.

The behaviour is not identical here - we now unconditionally probe the
FIFO depth on all hardware, the difference with the quirk is that we
will ignore any DT property specifying the depth.

> -	if (of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) {
> +	if (!(ddata && ddata->quirks & CQSPI_DETECT_FIFO_DEPTH) &&
> +	    of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) {
>  		dev_err(dev, "couldn't determine fifo-depth\n");

It's not obvious from just the code that we do handle having a FIFO
depth property and detection in the detection code, at least a comment
would be good.

> +static void cqspi_controller_detect_fifo_depth(struct cqspi_st *cqspi)
> +{
> +	const struct cqspi_driver_platdata *ddata = cqspi->ddata;
> +	struct device *dev = &cqspi->pdev->dev;
> +	u32 reg, fifo_depth;
> +
> +	/*
> +	 * Bits N-1:0 are writable while bits 31:N are read as zero, with 2^N
> +	 * the FIFO depth.
> +	 */
> +	writel(U32_MAX, cqspi->iobase + CQSPI_REG_SRAMPARTITION);
> +	reg = readl(cqspi->iobase + CQSPI_REG_SRAMPARTITION);
> +	fifo_depth = reg + 1;
> +
> +	if (ddata && ddata->quirks & CQSPI_DETECT_FIFO_DEPTH) {
> +		cqspi->fifo_depth = fifo_depth;
> +		dev_dbg(dev, "using FIFO depth of %u\n", fifo_depth);
> +	} else if (fifo_depth != cqspi->fifo_depth) {
> +		dev_warn(dev, "detected FIFO depth (%u) different from config (%u)\n",
> +			 fifo_depth, cqspi->fifo_depth);
> +	}

It's not obvious to me that we should ignore an explicitly specified
property if the quirk is present - if anything I'd more expect to see
the new warning in that case, possibly with a higher severity if we're
saying that the quirk means we're more confident that the data reported
by the hardware is reliable.  I think what I'd expect is that we always
use an explicitly specified depth (hopefully the user was specifying it
for a reason?).

Pulling all the above together can we just drop the quirk and always do
the detection, or leave the quirk as just controlling the severity with
which we log any difference between detected and explicitly configured
depths?

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  reply	other threads:[~2024-04-08 14:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 15:02 [PATCH v2 00/11] spi: cadence-qspi: add Mobileye EyeQ5 support Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 01/11] spi: dt-bindings: cdns,qspi-nor: add mobileye,eyeq5-ospi compatible Théo Lebrun
2024-04-08 14:13   ` Mark Brown
2024-04-05 15:02 ` [PATCH v2 02/11] spi: dt-bindings: cdns,qspi-nor: sort compatibles alphabetically Théo Lebrun
2024-04-06 11:38   ` Krzysztof Kozlowski
2024-04-08 14:14   ` Mark Brown
2024-04-08 14:41     ` Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 03/11] spi: cadence-qspi: allow building for MIPS Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 04/11] spi: cadence-qspi: store device data pointer in private struct Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 05/11] spi: cadence-qspi: add FIFO depth detection quirk Théo Lebrun
2024-04-08 14:10   ` Mark Brown [this message]
2024-04-08 14:38     ` Théo Lebrun
2024-04-08 14:45       ` Théo Lebrun
2024-04-08 14:51       ` Mark Brown
2024-04-09 10:07         ` Théo Lebrun
2024-04-09 15:51           ` Mark Brown
2024-04-05 15:02 ` [PATCH v2 06/11] spi: cadence-qspi: minimise register accesses on each op if !DTR Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 07/11] spi: cadence-qspi: add no-IRQ mode to indirect reads Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 08/11] spi: cadence-qspi: add early busywait to cqspi_wait_for_bit() Théo Lebrun
2024-04-08 14:16   ` Mark Brown
2024-04-08 14:42     ` Théo Lebrun
2024-04-08 16:40       ` Mark Brown
2024-04-09 10:09         ` Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 09/11] spi: cadence-qspi: add mobileye,eyeq5-ospi compatible Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 10/11] MIPS: mobileye: eyeq5: Add SPI-NOR controller node Théo Lebrun
2024-04-05 15:02 ` [PATCH v2 11/11] MIPS: mobileye: eyeq5: add octal flash node to eval board DTS Théo Lebrun
2024-04-05 15:30 ` [PATCH v2 00/11] spi: cadence-qspi: add Mobileye EyeQ5 support Théo Lebrun
2024-04-08 17:57 ` (subset) " Mark Brown

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