From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754774AbbFBLYR (ORCPT ); Tue, 2 Jun 2015 07:24:17 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:46891 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751949AbbFBLYJ (ORCPT ); Tue, 2 Jun 2015 07:24:09 -0400 Message-ID: <556D9220.8050205@ti.com> Date: Tue, 2 Jun 2015 16:53:12 +0530 From: Vignesh R User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Tero Kristo , Paul Walmsley , Thierry Reding , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Benoit Cousson , Tony Lindgren , Russell King , Mike Turquette , Stephen Boyd CC: , , , , , Subject: Re: [PATCH 3/5] ARM: dts: DRA7: Add TBCLK for PWMSS References: <1433159614-437-1-git-send-email-vigneshr@ti.com> <1433159614-437-4-git-send-email-vigneshr@ti.com> <556D67CB.8090309@ti.com> In-Reply-To: <556D67CB.8090309@ti.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 02 June 2015 01:52 PM, Tero Kristo wrote: > On 06/01/2015 02:53 PM, Vignesh R wrote: >> tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux >> clock to control ehrpwm tbclk. > > Care to add TRM reference here? Ok, I will add the following reference. tbclk is derived from SYSCLKOUT. The system clock - SYSCLKOUT is the ePWM functional clock derived from the gateable interface and functional clock of PWMSS. See AM57x TRM SPRUHZ6, October 2014, Section 29.2.2.1, Table 29-19 and the NOTE at the end of the table. > > -Tero > >> >> Signed-off-by: Vignesh R >> --- >> arch/arm/boot/dts/dra7.dtsi | 5 +++++ >> arch/arm/boot/dts/dra7xx-clocks.dtsi | 26 ++++++++++++++++++++++++++ >> 2 files changed, 31 insertions(+) >> >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi >> index f03a091cd076..387c76ca41f9 100644 >> --- a/arch/arm/boot/dts/dra7.dtsi >> +++ b/arch/arm/boot/dts/dra7.dtsi >> @@ -131,6 +131,11 @@ >> regulator-max-microvolt = <3000000>; >> }; >> }; >> + >> + scm_conf_clocks: clocks { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + }; >> }; >> >> dra7_pmx_core: pinmux@1400 { >> diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi >> b/arch/arm/boot/dts/dra7xx-clocks.dtsi >> index 3b933f74d000..92452d61cf58 100644 >> --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi >> +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi >> @@ -2136,3 +2136,29 @@ >> clocks = <&dpll_usb_ck>; >> }; >> }; >> + >> +&scm_conf_clocks { >> + ehrpwm0_tbclk: ehrpwm0_tbclk { >> + #clock-cells = <0>; >> + compatible = "ti,gate-clock"; >> + clocks = <&l4_root_clk_div>; >> + ti,bit-shift = <20>; >> + reg = <0x0558>; >> + }; >> + >> + ehrpwm1_tbclk: ehrpwm1_tbclk { >> + #clock-cells = <0>; >> + compatible = "ti,gate-clock"; >> + clocks = <&l4_root_clk_div>; >> + ti,bit-shift = <21>; >> + reg = <0x0558>; >> + }; >> + >> + ehrpwm2_tbclk: ehrpwm2_tbclk { >> + #clock-cells = <0>; >> + compatible = "ti,gate-clock"; >> + clocks = <&l4_root_clk_div>; >> + ti,bit-shift = <22>; >> + reg = <0x0558>; >> + }; >> +}; >> >