From: David Vrabel <david.vrabel@citrix.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>,
<david.vrabel@citrix.com>, <konrad.wilk@oracle.com>
Cc: <kevin.tian@intel.com>, <linux-kernel@vger.kernel.org>,
<dietmar.hahn@ts.fujitsu.com>, <xen-devel@lists.xen.org>,
<jbeulich@suse.com>
Subject: Re: [Xen-devel] [PATCH v5 3/6] xen/PMU: Initialization code for Xen PMU
Date: Thu, 2 Jul 2015 17:21:41 +0100 [thread overview]
Message-ID: <55956515.5050103@citrix.com> (raw)
In-Reply-To: <1435848816-3323-4-git-send-email-boris.ostrovsky@oracle.com>
On 02/07/15 15:53, Boris Ostrovsky wrote:
> Map shared data structure that will hold CPU registers, VPMU context,
> V/PCPU IDs of the CPU interrupted by PMU interrupt. Hypervisor fills
> this information in its handler and passes it to the guest for further
> processing.
>
> Set up PMU VIRQ.
>
> Now that perf infrastructure will assume that PMU is available on a PV
> guest we need to be careful and make sure that accesses via RDPMC
> instruction don't cause fatal traps by the hypervisor. Provide a nop
> RDPMC handler.
>
> For the same reason avoid issuing a warning on a write to APIC's LVTPC.
>
> Both of these will be made functional in later patches.
[...]
> + rc = bind_virq_to_irqhandler(VIRQ_XENPMU, cpu,
> + xen_pmu_irq_handler,
> + IRQF_PERCPU|IRQF_NOBALANCING,
> + pmu_name, NULL);
If you bind a VIRQ as IRQF_PERCPU it can only be safely unbound on the
CPU it is bound to (because the percpu handler does not take the
desc->lock).
Otherwise, Reviewed-by: David Vrabel <david.vrabel@citrix.com>
David
next prev parent reply other threads:[~2015-07-02 16:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-02 14:53 [PATCH v5 0/6] xen/PMU: PMU support for Xen PV(H) guests Boris Ostrovsky
2015-07-02 14:53 ` [PATCH v5 1/6] xen: xensyms support Boris Ostrovsky
2015-07-02 14:53 ` [PATCH v5 2/6] xen/PMU: Sysfs interface for setting Xen PMU mode Boris Ostrovsky
2015-07-02 16:16 ` [Xen-devel] " David Vrabel
2015-07-02 14:53 ` [PATCH v5 3/6] xen/PMU: Initialization code for Xen PMU Boris Ostrovsky
2015-07-02 16:21 ` David Vrabel [this message]
2015-07-02 17:14 ` [Xen-devel] " Boris Ostrovsky
2015-07-02 14:53 ` [PATCH v5 4/6] xen/PMU: Describe vendor-specific PMU registers Boris Ostrovsky
2015-07-02 14:53 ` [PATCH v5 5/6] xen/PMU: Intercept PMU-related MSR and APIC accesses Boris Ostrovsky
2015-07-02 14:53 ` [PATCH v5 6/6] xen/PMU: PMU emulation code Boris Ostrovsky
2015-07-02 16:22 ` [Xen-devel] " David Vrabel
2015-07-02 16:25 ` [Xen-devel] [PATCH v5 0/6] xen/PMU: PMU support for Xen PV(H) guests David Vrabel
2015-07-02 17:18 ` Boris Ostrovsky
2015-08-07 15:35 ` David Vrabel
2015-08-07 15:50 ` Julien Grall
2015-08-07 16:06 ` Boris Ostrovsky
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