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Fri, 23 Oct 2026 09:07:06 -0700 (PDT) Received: from [192.168.1.73] ([92.247.57.178]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a2a9062d50sm15404525e9.2.2026.10.23.09.07.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 09:07:05 -0700 (PDT) Message-ID: <559fdf87-368d-4e31-b754-897353898d7a@oss.qualcomm.com> Date: Fri, 23 Oct 2026 19:07:04 +0300 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] media: qcom: camss: clamp VFE clock rates to the highest level To: Loic Poulain Cc: Bryan O'Donoghue , Mauro Carvalho Chehab , Vladimir Zapolskiy , Gjorgji Rosikopulos , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261023152857.2859767-1-atanas.filipov@oss.qualcomm.com> <20261023152857.2859767-2-atanas.filipov@oss.qualcomm.com> Content-Language: en-US From: Atanas Filipov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDA2MyBTYWx0ZWRfXyzrnotyZkwa0 J1KbdTY1P28P8nF/6uuWrfHb92BUASSqEYb0wMkzM4/Rlq3exGeRv1DLtMwocnjeWzfP3WxetcE 4XJMlF8K3GCi5XvwI8xuGJx7yCB8zywtsvJCfHn537W/dBLCs2R+XpN7Ptg/hoVqLuNq3RNtahU vH0RrLeHS2g09JtzmThtTXhcLXmfRE5+Zua350S+ucYzpLHvaiBfn4uD4PU1qj6DjM6n/9HZypv Q5ED7489uc3nne1M0c2Dcdb7pdWPYjnvd+qBNb7yK/bHCPcVWqROUuO5rbZ4N/PZp2r/JRRdZn5 lb3+jSB5x5YD1xDxq/St9szvrcqAdVCNKVeywVmevhCQKk/SE6PUZcg9eRCgyJIvm8fjtWvxWZr 2oxrddYnT/0xgoDlmDOD5BFx4GTpnzImEd9ktSIRVGb8CCQlmm2MFSJKsH9cl2D6cVNUw6+kIy5 4MkpW6nbfnFP+DbsTyg== X-Proofpoint-GUID: XdD-UrUbeOQwUJrjxHd9ni2E-4IgP93J X-Authority-Analysis: v=2.4 cv=Scxi5fRu c=1 sm=1 tr=0 ts=6adb862c cx=c_pps a=N1BjEkVkxJi3uNfLdpvX3g==:117 a=ybD9qRDIDfZaXNPQ7Ca20A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=OtwWDPiBtiHqWltJD10A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=crWF4MFLhNY0qMRaF8an:22 X-Proofpoint-ORIG-GUID: XdD-UrUbeOQwUJrjxHd9ni2E-4IgP93J X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDA2MyBTYWx0ZWRfX06OdG7Z19Now WplUrAEUHxHpF3lg90bCqNjBf5bayqOJ0/TEm/yDGvW2msTYH6VUKOYZ0jFjy58kVpG4Kgt2sHL TPC/NU3yjobMR7v87ka7Y3t30VM45yM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 malwarescore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230063 On 10/23/2026 6:45 PM, Loic Poulain wrote: > On Fri, Oct 23, 2026 at 5:29 PM Atanas Filipov > wrote: >> >> The VFE fails to power on when the pixel rate exceeds the highest rate >> listed for any of its clocks. The rate tables of the VFE clocks are >> independent and need not have the same number of levels, so a clock >> with a lower top rate than the VFE core clock, such as the SC7280 >> camnoc_axi clock, makes the VFE reject pixel rates the core clock >> still supports. >> >> Clamp each clock to its highest listed rate instead, and warn that the >> pixel rate exceeds it when the clock lists more than one rate. Take the >> clamp into account when another line powers on an already running VFE, >> so that a clock running at its highest rate does not reject the >> request. > > IMO, this function has become a bit messy. We should split the core > clock selection into a dedicated helper, as it is directly tied to the > pixel rate. The AXI clock scaling/selection should be handled > separately, potentially through the interconnect (ICC) framework (when > available). > > Regards, > Loic > In any case, I'll split it into at least two parts in the next version. Regards, Atanas >> >> Signed-off-by: Atanas Filipov >> --- >> drivers/media/platform/qcom/camss/camss-vfe.c | 18 ++++++++++++------ >> 1 file changed, 12 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c >> index 2680a9914765..87096095b1eb 100644 >> --- a/drivers/media/platform/qcom/camss/camss-vfe.c >> +++ b/drivers/media/platform/qcom/camss/camss-vfe.c >> @@ -982,15 +982,13 @@ static int vfe_set_clock_rates(struct vfe_device *vfe) >> >> camss_add_clock_margin(&min_rate); >> >> - for (j = 0; j < clock->nfreqs; j++) >> + for (j = 0; j < clock->nfreqs - 1; j++) >> if (min_rate < clock->freq[j]) >> break; >> >> - if (j == clock->nfreqs) { >> - dev_err(dev, >> - "Pixel clock is too high for VFE"); >> - return -EINVAL; >> - } >> + if (clock->nfreqs > 1 && min_rate >= clock->freq[j]) >> + dev_warn(dev, "Pixel clock is too high for VFE clock %s\n", >> + clock->name); >> >> /* if sensor pixel clock is not available */ >> /* set highest possible VFE clock rate */ >> @@ -1041,6 +1039,7 @@ static int vfe_check_clock_rates(struct vfe_device *vfe) >> if (vfe_match_clock_names(vfe, clock) && vfe_check_clock_levels(clock)) { >> u64 min_rate = 0; >> unsigned long rate; >> + long max_rate; >> >> for (j = VFE_LINE_RDI0; j < vfe->res->line_num; j++) { >> u32 tmp; >> @@ -1063,6 +1062,13 @@ static int vfe_check_clock_rates(struct vfe_device *vfe) >> >> camss_add_clock_margin(&min_rate); >> >> + /* A clock already at its highest rate cannot go higher */ >> + max_rate = clk_round_rate(clock->clk, clock->freq[clock->nfreqs - 1]); >> + if (max_rate < 0) >> + return max_rate; >> + >> + min_rate = min_t(u64, min_rate, max_rate); >> + >> rate = clk_get_rate(clock->clk); >> if (rate < min_rate) >> return -EBUSY; >> -- >> 2.34.1 >>