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Tue, 14 Jan 2025 09:56:50 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50E9unnv005255 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 14 Jan 2025 09:56:49 GMT Received: from [10.239.133.114] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 14 Jan 2025 01:56:47 -0800 Message-ID: <55cf5c56-3841-4b1d-9d8b-7b88b8bcff96@quicinc.com> Date: Tue, 14 Jan 2025 17:56:45 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] coresight-etm4x: add isb() before reading the TRCSTATR From: Yuanfang Zhang To: , , , CC: , , References: <20241206080240.59313-1-quic_yuanfang@quicinc.com> Content-Language: en-US In-Reply-To: <20241206080240.59313-1-quic_yuanfang@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: -f65y2qI1Xll0TlwDZUVNO7CN98LFVpg X-Proofpoint-ORIG-GUID: -f65y2qI1Xll0TlwDZUVNO7CN98LFVpg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 malwarescore=0 bulkscore=0 phishscore=0 adultscore=0 impostorscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 mlxlogscore=914 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501140083 On 12/6/2024 4:02 PM, yuanfang zhang wrote: > From: Yuanfang Zhang > > As recommended by section 4.3.7 ("Synchronization when using system > instructions to progrom the trace unit") of ARM IHI 0064H.b, the > self-hosted trace analyzer must perform a Context synchronization > event between writing to the TRCPRGCTLR and reading the TRCSTATR. > > Fixes: ebddaad09e10 ("coresight: etm4x: Add missing single-shot control API to sysfs") > Signed-off-by: Yuanfang Zhang > --- > Changes in V3: > 1. Remove dsb(sy) after polling TRCSTATR. > 2. Add isb() after polling TRCSTATR. > --- > .../hwtracing/coresight/coresight-etm4x-core.c | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index 66d44a404ad0..c6ea00bba0cc 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -531,7 +531,6 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) > * As recommended by section 4.3.7 ("Synchronization when using the > * memory-mapped interface") of ARM IHI 0064D > */ > - dsb(sy); > isb(); > > done: > @@ -906,10 +905,25 @@ static void etm4_disable_hw(void *info) > tsb_csync(); > etm4x_relaxed_write32(csa, control, TRCPRGCTLR); > > + /* > + * As recommended by section 4.3.7 ("Synchronization when using system > + * instructions to progrom the trace unit") of ARM IHI 0064H.b, the > + * self-hosted trace analyzer must perform a Context synchronization > + * event between writing to the TRCPRGCTLR and reading the TRCSTATR. > + */ > + if (!csa->io_mem) > + isb(); > + > /* wait for TRCSTATR.PMSTABLE to go to '1' */ > if (coresight_timeout(csa, TRCSTATR, TRCSTATR_PMSTABLE_BIT, 1)) > dev_err(etm_dev, > "timeout while waiting for PM stable Trace Status\n"); > + /* > + * As recommended by section 4.3.7 (Synchronization of register updates) > + * of ARM IHI 0064H.b. > + */ > + isb(); > + > /* read the status of the single shot comparators */ > for (i = 0; i < drvdata->nr_ss_cmp; i++) { > config->ss_status[i] = gently reminder