From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753658AbdEJPcv (ORCPT ); Wed, 10 May 2017 11:32:51 -0400 Received: from mx08-00252a01.pphosted.com ([91.207.212.211]:47674 "EHLO mx08-00252a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751267AbdEJPcu (ORCPT ); Wed, 10 May 2017 11:32:50 -0400 Subject: Re: [PATCH] irqchip/bcm2836: Move SMP startup code to arch/arm To: Marc Zyngier , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20170510132620.19685-1-marc.zyngier@arm.com> <2c3f16ea-8806-9ae8-9bae-02e198a59092@arm.com> <27076f41-1616-ea16-6422-11692f95bdec@raspberrypi.org> <9334afc8-ddf1-b3ec-6560-ff720f8b82dc@arm.com> Cc: Eric Anholt , Thomas Gleixner , Jason Cooper , Florian Fainelli , Ray Jui , Scott Branden From: Phil Elwell Message-ID: <55d1d773-7220-6448-5ef4-e9b5595c0f68@raspberrypi.org> Date: Wed, 10 May 2017 16:32:48 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <9334afc8-ddf1-b3ec-6560-ff720f8b82dc@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-05-10_11:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_spam_notspam policy=outbound_spam score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1705100104 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/05/2017 16:31, Marc Zyngier wrote: > On 10/05/17 16:07, Phil Elwell wrote: >> On 10/05/2017 14:32, Marc Zyngier wrote: >>> On 10/05/17 14:26, Marc Zyngier wrote: >>>> One of the RPi-2/3 irqchip's key features is that it contains some >>>> SMP startup code for the 32bit ARM architecture version. The only >>>> reason I can imagine for this is "RPi is special". >>>> >>>> Let's move this code where it belongs (in the platform support code), >>>> creating a shared include file for this purpose. >>>> >>>> Signed-off-by: Marc Zyngier >>> >>> Also: >>> Fixes: 41f4988cc287 ("irqchip/bcm2836: Add SMP support for the 2836") >>> >>> M. >>> >> >> The patch has some checkpatch warnings, but otherwise: > > Bah... > > WARNING: line over 80 characters > #51: FILE: arch/arm/mach-bcm/board_bcm2835.c:30: > +static int bcm2836_smp_boot_secondary(unsigned int cpu, struct task_struct *idle) > > WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? > #194: > new file mode 100644 > > Yup, the checkpatch stamp of approval. My screen has stopped being > limited to 80 chars at some point between 1989 and 1991. As for the > MAINTAINERS file, that's probably for the maintainers to pick it up. > >> Reviewed-by: Phil Elwell >> Tested-by: Phil Elwell > > Thanks. I assume you'll respin your DSB/SEV fix on top of this? Yes - how does one manage the timing of interdependent patches? Phil