mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Juergen Gross <jgross@suse.com>
To: Brian Gerst <brgerst@gmail.com>
Cc: linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>, Pu Wen <puwen@hygon.cn>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH 4/4] x86: switch to cpu_feature_enabled() for X86_FEATURE_XENPV
Date: Thu, 3 Nov 2022 14:24:56 +0100	[thread overview]
Message-ID: <55fd2726-b54a-73a7-49ec-e66e025699a7@suse.com> (raw)
In-Reply-To: <CAMzpN2hynmZ39ByCRg4ibm=Mz+5LbLps77k9Vhb+c+VmVUO1=A@mail.gmail.com>


[-- Attachment #1.1.1: Type: text/plain, Size: 4925 bytes --]

On 03.11.22 14:19, Brian Gerst wrote:
> On Thu, Nov 3, 2022 at 8:37 AM Juergen Gross <jgross@suse.com> wrote:
>>
>> Convert the remaining cases of static_cpu_has(X86_FEATURE_XENPV) and
>> boot_cpu_has(X86_FEATURE_XENPV) to use cpu_feature_enabled(), allowing
>> more efficient code in case the kernel is configured without
>> CONFIG_XEN_PV.
>>
>> Signed-off-by: Juergen Gross <jgross@suse.com>
>> ---
>>   arch/x86/kernel/cpu/amd.c    | 2 +-
>>   arch/x86/kernel/cpu/bugs.c   | 2 +-
>>   arch/x86/kernel/cpu/hygon.c  | 2 +-
>>   arch/x86/kernel/process_64.c | 4 ++--
>>   arch/x86/kernel/topology.c   | 2 +-
>>   arch/x86/mm/cpu_entry_area.c | 2 +-
>>   6 files changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
>> index 860b60273df3..697fe881e967 100644
>> --- a/arch/x86/kernel/cpu/amd.c
>> +++ b/arch/x86/kernel/cpu/amd.c
>> @@ -985,7 +985,7 @@ static void init_amd(struct cpuinfo_x86 *c)
>>                          set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
>>
>>          /* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
>> -       if (!cpu_has(c, X86_FEATURE_XENPV))
>> +       if (!cpu_feature_enabled(X86_FEATURE_XENPV))
>>                  set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>>
>>          /*
>> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
>> index da7c361f47e0..7f78e1527c5e 100644
>> --- a/arch/x86/kernel/cpu/bugs.c
>> +++ b/arch/x86/kernel/cpu/bugs.c
>> @@ -1302,7 +1302,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
>>                  return SPECTRE_V2_CMD_AUTO;
>>          }
>>
>> -       if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
>> +       if (cmd == SPECTRE_V2_CMD_IBRS && cpu_feature_enabled(X86_FEATURE_XENPV)) {
>>                  pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
>>                         mitigation_options[i].option);
>>                  return SPECTRE_V2_CMD_AUTO;
>> diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
>> index 21fd425088fe..1c27645fd429 100644
>> --- a/arch/x86/kernel/cpu/hygon.c
>> +++ b/arch/x86/kernel/cpu/hygon.c
>> @@ -339,7 +339,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
>>          set_cpu_cap(c, X86_FEATURE_ARAT);
>>
>>          /* Hygon CPUs don't reset SS attributes on SYSRET, Xen does. */
>> -       if (!cpu_has(c, X86_FEATURE_XENPV))
>> +       if (!cpu_feature_enabled(X86_FEATURE_XENPV))
>>                  set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>>
>>          check_null_seg_clears_base(c);
>> diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
>> index 6b3418bff326..e2f469175be8 100644
>> --- a/arch/x86/kernel/process_64.c
>> +++ b/arch/x86/kernel/process_64.c
>> @@ -165,7 +165,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)
>>
>>          lockdep_assert_irqs_disabled();
>>
>> -       if (!static_cpu_has(X86_FEATURE_XENPV)) {
>> +       if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
>>                  native_swapgs();
>>                  gsbase = rdgsbase();
>>                  native_swapgs();
>> @@ -190,7 +190,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)
>>   {
>>          lockdep_assert_irqs_disabled();
>>
>> -       if (!static_cpu_has(X86_FEATURE_XENPV)) {
>> +       if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
>>                  native_swapgs();
>>                  wrgsbase(gsbase);
>>                  native_swapgs();
>> diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
>> index 8617d1ed9d31..1b83377274b8 100644
>> --- a/arch/x86/kernel/topology.c
>> +++ b/arch/x86/kernel/topology.c
>> @@ -106,7 +106,7 @@ int arch_register_cpu(int num)
>>           * Xen PV guests don't support CPU0 hotplug at all.
>>           */
>>          if (c->x86_vendor != X86_VENDOR_INTEL ||
>> -           boot_cpu_has(X86_FEATURE_XENPV))
>> +           cpu_feature_enabled(X86_FEATURE_XENPV))
>>                  cpu0_hotpluggable = 0;
>>
>>          /*
>> diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
>> index 6c2f1b76a0b6..c83799753d44 100644
>> --- a/arch/x86/mm/cpu_entry_area.c
>> +++ b/arch/x86/mm/cpu_entry_area.c
>> @@ -147,7 +147,7 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
>>           * On Xen PV, the GDT must be read-only because the hypervisor
>>           * requires it.
>>           */
>> -       pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
>> +       pgprot_t gdt_prot = cpu_feature_enabled(X86_FEATURE_XENPV) ?
>>                  PAGE_KERNEL_RO : PAGE_KERNEL;
>>          pgprot_t tss_prot = PAGE_KERNEL;
>>   #endif
> 
> This is another case that can be removed because it's for 32-bit.

Oh yes, indeed. Thanks for noticing.


Juergen


[-- Attachment #1.1.2: OpenPGP public key --]
[-- Type: application/pgp-keys, Size: 3149 bytes --]

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 495 bytes --]

      reply	other threads:[~2022-11-03 13:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-03 11:36 [PATCH 0/4] Switch X86_FEATURE_XENPV to cpu_feature_enabled() use Juergen Gross
2022-11-03 11:36 ` [PATCH 1/4] x86: add X86_FEATURE_XENPV to disabled-features.h Juergen Gross
2022-11-03 11:36 ` [PATCH 2/4] x86: remove unneeded 64-bit dependency in arch_enter_from_user_mode() Juergen Gross
2022-11-03 11:36 ` [PATCH 3/4] x86: drop 32-bit Xen PV guest code in update_task_stack() Juergen Gross
2022-11-03 11:36 ` [PATCH 4/4] x86: switch to cpu_feature_enabled() for X86_FEATURE_XENPV Juergen Gross
2022-11-03 13:19   ` Brian Gerst
2022-11-03 13:24     ` Juergen Gross [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55fd2726-b54a-73a7-49ec-e66e025699a7@suse.com \
    --to=jgross@suse.com \
    --cc=bp@alien8.de \
    --cc=brgerst@gmail.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luto@kernel.org \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=puwen@hygon.cn \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®