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AJvYcCUhMqTk4EPa6PvVvu7M2W33pokhT9ikrlpPl9OtGS22z4YyvMhlf3fvWJcelXIUJ06vVU6BdghCJRsoweI70BsYj3rQfkjrMM0adGlu X-Gm-Message-State: AOJu0YwKpO95WjihdD/wpIitLwomQf8I6udxru6Mc6F4IKRfdAfNY4rK ZdkpDCRXaQmrP6dOWbxzLA3KrqV141tlAqVD47tfw13A7hKn6Gj15JaZkhJNVxo= X-Google-Smtp-Source: AGHT+IFauYr0ttYbvunq4xdpMe1oQLsmvrROpymwVJP8xmztwIB4iqaH0gjqAwcT0IX2HxafV4aRTQ== X-Received: by 2002:a05:600c:1d25:b0:414:7e73:1f5b with SMTP id l37-20020a05600c1d2500b004147e731f5bmr543430wms.4.1712302402435; Fri, 05 Apr 2024 00:33:22 -0700 (PDT) Received: from draszik.lan ([80.111.64.44]) by smtp.gmail.com with ESMTPSA id v19-20020a05600c471300b004157ff88ad7sm1903275wmo.7.2024.04.05.00.33.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Apr 2024 00:33:22 -0700 (PDT) Message-ID: <560e9a5b236728f62be4bfd8df187071c4bffb23.camel@linaro.org> Subject: Re: [PATCH 06/17] arm64: dts: exynos: gs101: Add the hsi2 sysreg node From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Peter Griffin , mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, jejb@linux.ibm.com, martin.petersen@oracle.com, chanho61.park@samsung.com, ebiggers@kernel.org Cc: linux-scsi@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tudor.ambarus@linaro.org, saravanak@google.com, willmcvicker@google.com Date: Fri, 05 Apr 2024 08:33:20 +0100 In-Reply-To: <20240404122559.898930-7-peter.griffin@linaro.org> References: <20240404122559.898930-1-peter.griffin@linaro.org> <20240404122559.898930-7-peter.griffin@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3-1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Pete, On Thu, 2024-04-04 at 13:25 +0100, Peter Griffin wrote: > This has some configuration bits such as sharability that > are required by UFS. >=20 > Signed-off-by: Peter Griffin > --- > =C2=A0arch/arm64/boot/dts/exynos/google/gs101.dtsi | 6 ++++++ > =C2=A01 file changed, 6 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/bo= ot/dts/exynos/google/gs101.dtsi > index 38ac4fb1397e..608369cec47b 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -1265,6 +1265,12 @@ cmu_hsi2: clock-controller@14400000 { > =C2=A0 clock-names =3D "oscclk", "bus", "pcie", "ufs_embd", "mmc_card"; > =C2=A0 }; > =C2=A0 > + sysreg_hsi2: syscon@14420000 { > + compatible =3D "google,gs101-hsi2-sysreg", "syscon"; > + reg =3D <0x14420000 0x1000>; Should the length not be 0x10000? Cheers, Andre'