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From: Paolo Bonzini <pbonzini@redhat.com>
To: Li Wang <liwang@redhat.com>,
	ricardo.neri-calderon@linux.intel.com, tglx@linutronix.de,
	kernellwp@gmail.com, ricardo.neri@intel.com,
	pengfei.xu@intel.com
Cc: LTP List <ltp@lists.linux.it>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Ping Fang <pifang@redhat.com>
Subject: Re: [Kernel BUG?] SMSW operation get success on UMIP KVM guest
Date: Mon, 1 Jul 2019 14:02:35 +0200	[thread overview]
Message-ID: <5622c0ac-236f-4e3e-a132-c8d3bd8fadc4@redhat.com> (raw)
In-Reply-To: <CAEemH2cg01cdz=amrCWU00Xof9+cxmfR_DqCBaQe36QoGsakmA@mail.gmail.com>

On 01/07/19 09:50, Li Wang wrote:
> Hello there,
> 
> LTP/umip_basic_test get failed on KVM UMIP
> system(kernel-v5.2-rc4.x86_64). The test is only trying to do
>      asm volatile("smsw %0\n" : "=m" (val));
> and expect to get SIGSEGV in this SMSW operation, but it exits with 0
> unexpectedly.

In addition to what Thomas said, perhaps you are using a host that does
*not* have UMIP, and configuring KVM to emulate it(*).  In that case, it
is not possible to intercept SMSW, and therefore it will incorrectly
succeed.

Paolo

(*) before the x86 people jump at me, this won't happen unless you
explicitly pass an option to QEMU, such as "-cpu host,+umip". :)  The
incorrect emulation of SMSW when CR4.UMIP=1 is why.

  parent reply	other threads:[~2019-07-01 12:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CAEemH2cg01cdz=amrCWU00Xof9+cxmfR_DqCBaQe36QoGsakmA@mail.gmail.com>
2019-07-01  8:03 ` Thomas Gleixner
2019-07-01 12:02 ` Paolo Bonzini [this message]
2019-07-01 14:53   ` Ricardo Neri
2019-07-01 17:30     ` Paolo Bonzini
     [not found]   ` <CAEemH2fqMpoiBo+asyawHsOWgdXy-ggV0mwQs9A9EJ1kh=uhAA@mail.gmail.com>
2019-07-01 16:03     ` Ricardo Neri
     [not found]       ` <CAEemH2fR98TBHaOM37aGmzbgdZ_XPokJeUNN6dU1r=1WhOSmEw@mail.gmail.com>
2019-07-02  8:40         ` Pengfei Xu

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