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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa20dffd771sm294251066b.121.2024.11.16.03.19.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 16 Nov 2024 03:19:52 -0800 (PST) Message-ID: <5648484f-38f2-4c75-b8a3-7a0148dc940b@oss.qualcomm.com> Date: Sat, 16 Nov 2024 12:19:49 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties To: Krishna chaitanya chundru , quic_mrana@quicinc.com, quic_vbadigan@quicinc.com, kernel@quicinc.com, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Helgaas , Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20241116-presets-v1-0-878a837a4fee@quicinc.com> <20241116-presets-v1-1-878a837a4fee@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241116-presets-v1-1-878a837a4fee@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: ZP10J2u_KKc0wFVMVc_NYrZt83BsiF1O X-Proofpoint-ORIG-GUID: ZP10J2u_KKc0wFVMVc_NYrZt83BsiF1O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 spamscore=0 adultscore=0 mlxlogscore=897 malwarescore=0 impostorscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411160095 On 16.11.2024 2:37 AM, Krishna chaitanya chundru wrote: > Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data > rates used in lane equalization procedure. > > Signed-off-by: Krishna chaitanya chundru > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index a36076e3c56b..6a2074297030 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > phys = <&pcie6a_phy>; > phy-names = "pciephy"; > > + eq-presets-8gts = /bits/ 16 <0x5555 0x5555>; If we make all of these presets u8 arrays, we can use the: property = [0xff 0xff 0xff 0xff]; syntax Konrad