From: Marc Zyngier <maz@kernel.org>
To: Steven Price <steven.price@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, <kvmarm@lists.cs.columbia.edu>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: Re: [PATCH v2 1/2] arm64: Combine workarounds for speculative AT errata
Date: Wed, 13 Nov 2019 13:53:48 +0109 [thread overview]
Message-ID: <566ecd45c8bf07b3cb5d75a10c9413a8@www.loen.fr> (raw)
In-Reply-To: <20191113114118.2427-2-steven.price@arm.com>
On 2019-11-13 12:50, Steven Price wrote:
> Cortex-A57/A72 have a similar errata to Cortex-A76 regarding
> speculation
> of the AT instruction. Since the workaround for A57/A72 doesn't
> require
> VHE, the restriction enforcing VHE for A76 can be removed by
> combining
> the workaround flag for both errata.
Are we sure that A76 behaves the same as A57/A72 when it comes to not
caching any of the EPD* bits in the TLB? Because the 1319367 workaround
has a lot of the A72 microarch implicit to it, and I'm not sure this
works as is on A76 or A55...
The patch itself looks OK, but I'd like some reassurance about the
above.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2019-11-13 12:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-13 11:41 [PATCH v2 0/2] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
2019-11-13 11:41 ` [PATCH v2 1/2] arm64: Combine workarounds for speculative AT errata Steven Price
2019-11-13 12:44 ` Marc Zyngier [this message]
2019-11-13 14:29 ` Steven Price
2019-11-13 14:01 ` Suzuki K Poulose
2019-11-13 14:43 ` Steven Price
2019-11-13 11:41 ` [PATCH v2 2/2] arm64: Workaround for Cortex-A55 erratum 1530923 Steven Price
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