On 2026-09-01 08:07, Takashi Iwai wrote:

> But, first off, could you give more details about your hardware?
> At best, give alsa-info.sh output (run with --no-upload option and
> attach the output).

I got access to the machine and configured a VPN for some slower remote 
testing. It is an HP ENVY 27-p014 with a Sunrise Point HDA controller, 
8086:a170, subsystem 103c:2b3e. It has a Conexant CX20753/4 at cad0 and 
Intel HDMI at cad2. Attached is the output of alsa-info.sh --no-upload.
I also put the earlier reduction tests and the newer controls here:

https://forge.caseytunturi.com/Fimeg/hp-envy-27-p014-hda

Much of the reduction was already done before I sent v1. Runs A through 
G progressively removed the RINTCNT change, PCI command cycle, IRQ 
quiescing, abnormal controller init, and clock-gate handling... just 
standard chew of too much code. The remaining behavior that consistently 
brought cad0 back was the tight CRST sequence. > Can't the standard 
snd_hdac_bus_reset_link() work? If not, we may
> tweak there in the standard code instead of open-code here.
I tested snd_hdac_bus_reset_link(bus, true) at the same probe point. In 
that test it left STATESTS at 0x4 and only HDMI enumerated. Restoring 
the reduced tight-reset version brought cad0 back.

I also tested with the probe reset removed entirely. That gives HDMI 
only, including from a cold boot. The source variants, module hashes, 
and logs for those tests are in the archive above - and I'm happy to 
double check.

With the board on the power-save denylist, removing the system-resume 
reset leaves cad0 registered after S3, but codec commands time out and 
capture fails. With the reset restored, capture works after the same 
deep S3 test.

I do not have a narrower condition for the reset yet.

I haven't tested S4.

> Trying the bus reset at probe is understandable, but...
> ... those look too ugly. The use of PIO mode isn't mentioned in the 
> description, either. Maybe PIO mode should be used always for your 
> board? Glad you pointed this out - temporary PIO is not needed. I 
> alternated a version with the PIO switch removed against the current 
> reduced version; both enumerated cad0 and completed the mixer reads. A 
> cold boot without the PIO switch also enumerated the codec, so current 
> running version does not have this anymore.

> Add to power_save_denylist, instead.

Done, no problems there.

I'm unsure why the standard reset helper does not recover cad0 where the 
tighter sequence does. I haven't tried to modify 
snd_hdac_bus_reset_link() directly yet - but if that's the subsection 
this belongs in I can ensure I comprehend it before sending a v2.

Casey