From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964883AbcBCIss (ORCPT ); Wed, 3 Feb 2016 03:48:48 -0500 Received: from mail-wm0-f46.google.com ([74.125.82.46]:36051 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964835AbcBCIsm (ORCPT ); Wed, 3 Feb 2016 03:48:42 -0500 Subject: Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines To: Patrick Lai , alsa-devel@alsa-project.org, Banajit Goswami , Liam Girdwood , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Takashi Iwai , Mark Brown References: <1454347622-9970-1-git-send-email-srinivas.kandagatla@linaro.org> <1454347735-10654-1-git-send-email-srinivas.kandagatla@linaro.org> <20160203003638.GH14436@kwestfie-linux.qualcomm.com> From: Srinivas Kandagatla Message-ID: <56B1BEE8.9060808@linaro.org> Date: Wed, 3 Feb 2016 08:48:40 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160203003638.GH14436@kwestfie-linux.qualcomm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/02/16 00:36, Kenneth Westfield wrote: > On Mon, Feb 01, 2016 at 09:28:55AM -0800, Srinivas Kandagatla wrote: >> diff --git a/sound/soc/qcom/lpass-lpaif-reg.h >> b/sound/soc/qcom/lpass-lpaif-reg.h >> index 95e22f1..8a64d1a 100644 >> --- a/sound/soc/qcom/lpass-lpaif-reg.h >> +++ b/sound/soc/qcom/lpass-lpaif-reg.h >> @@ -47,6 +47,28 @@ > > ... > >> +#define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) >> +#define LPAIF_I2SCTL_MICMODE_SHIFT 4 >> +#define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_QUAD02 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) > > LPAIF_I2SCTL_MICMODE_QUAD02 should be LPAIF_I2SCTL_MICMODE_QUAD23, as > the suffix numbers refer to SD[0-3]. Ok, will fix this in next version. >