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From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Yuriy Kolerov <Yuriy.Kolerov@synopsys.com>,
	"linux-snps-arc@lists.infradead.org" 
	<linux-snps-arc@lists.infradead.org>
Cc: "Vineet.Gupta1@synopsys.com" <Vineet.Gupta1@synopsys.com>,
	"Alexey.Brodkin@synopsys.com" <Alexey.Brodkin@synopsys.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARCv2: MCIP: Deprecate setting of affinity in Device Tree
Date: Wed, 23 Nov 2016 12:33:04 -0800	[thread overview]
Message-ID: <56a05936-ab5c-da79-39b9-571ec708f3b9@synopsys.com> (raw)
In-Reply-To: <8548fefd-15e1-5ce4-0e23-05022286841f@arm.com>

On 11/22/2016 03:22 AM, Marc Zyngier wrote:
>> 2. The kernel will not call idu_irq_set_affinity() for IDU interrupt
>> > controller in some cases. It happens when the top interrupt
>> > controller does not support setting of the affinity and does not even
>> > support propagating of it (e.g. a GPIO interrupt controller on top of
>> > IDU which funnels all interrupts in one line). However
>> > idu_irq_set_affinity() must be called to unmask common interrupts in
>> > IDU. And if I want to make an affinity in irq_desc to match a real
>> > affinity I must call irq_set_affinity() instead of just
>> > idu_irq_set_affinity() .
>
> My brain has just melted. Can you describe this a bit more, possibly
> using some ASCII diagrams? I really don't understand what the affinity
> settings have to do with unmasking the interrupt... It is that you mask
> an interrupt by routing it to a dummy CPU?

The AXS SDP board has an "interesting" cascade of interrupt controllers.
Exact setup in arch/arc/boot/dts/{axc003_idu,axs10x_mb}.dtsi


	/*
	 * Peripherals on CPU Card and Mother Board are wired to cpu intc via
	 * intermediate DW APB GPIO blocks (mainly for debouncing)
	 *
	 *        --------------------
	 *        |  snps,archs-intc |
	 *        --------------------
	 *          | #24   	  |#25
	 * 	  --------------------
	 * 	  |  snps,archs-intc |
	 * 	  --------------------
	 *          | #0          | #1
	 * -------------------   -------------------
	 * | snps,dw-apb-gpio |  | snps,dw-apb-gpio |
	 * |   (pass thru)    |  |                  |
	 * -------------------   -------------------
	 *        | #12                     |
	 *        |                 [ Debug UART on cpu card ]
	 *        |
	 * ------------------------
	 * | snps,dw-apb-intc (MB)|
	 * ------------------------
	 *  |      |       |      |
	 * [eth] [uart]        [... other perip on Main Board]

      reply	other threads:[~2016-11-23 20:33 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-11 14:38 Yuriy Kolerov
2016-11-11 15:28 ` Marc Zyngier
2016-11-14 14:35   ` Yuriy Kolerov
2016-11-22 11:22     ` Marc Zyngier
2016-11-23 20:33       ` Vineet Gupta [this message]

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