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Tue, 30 Jun 2026 04:25:17 -0700 (PDT) X-Received: by 2002:a05:622a:2d2:b0:51b:ff1a:3d80 with SMTP id d75a77b69052e-51c108c0a75mr26145891cf.7.1782818717294; Tue, 30 Jun 2026 04:25:17 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1288d16b06sm108856866b.8.2026.06.30.04.25.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Jun 2026 04:25:16 -0700 (PDT) Message-ID: <56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com> Date: Tue, 30 Jun 2026 13:25:13 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/3] arm64: dts: qcom: kodiak: enable inline crypto engine for SDHC To: Kuldeep Singh , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neeraj Soni References: <20260629-ice_emmc_support-v8-0-1a26e1717b85@oss.qualcomm.com> <20260629-ice_emmc_support-v8-2-1a26e1717b85@oss.qualcomm.com> <1a0b91c6-5e17-4330-a8ab-ac14d3339024@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: DsSFfOopRKxOZAPZie4Enxan99fZy0Nb X-Authority-Analysis: v=2.4 cv=KqJ9H2WN c=1 sm=1 tr=0 ts=6a43a79e cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=YUSBgXEUuFXLcjEF3eYA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjMwMDEwNSBTYWx0ZWRfX46I2NS4ZkAk1 49m8D13etAdmF7CnahydF5he3TVqQ3tA1USzuFKTjkrYnCm9HMR67xqCjKKR7VOvSvl8zzLv+w+ n23b2mmBHjFtYqSJlUlo5Hfz+HNqUBaevjZssZ7RfqX1tIWi+uVNhWbhE5LDG2drjTppLekOQPk O6576Zduc1hxAGGCummxz2DlRasSTUMMcGNi91Nq3M/cma8V0Dea464MVFapC222WEDon879j4B H6g7eoDXfU+SLg2NLSW/ipZ35hScTatQe9HKSwX+kXu43D//RVPQB85uR6lbglAwVxqoRF5bVwx ORvFISvZB8V/ZLUucPXUbkiJfh9x0/3G3K5r56kmochSZ3Nt+ys61CHNFEqOkp0T0omS0Zj9bRG bisHZOt7bmZ4lGgqw3MvRthKZEZVgPnUK8arQwR6r+d/LtBfvMih9hJD89umHeZZysYzIYwVPln ssuwqqI2n1YbbQaQLWg== X-Proofpoint-ORIG-GUID: DsSFfOopRKxOZAPZie4Enxan99fZy0Nb X-Proofpoint-Spam-Info: AW1haW4tMjYwNjMwMDEwNSBTYWx0ZWRfX+gKs57THFq4b inzK0RqVEjj1lDy1nus2ldkZDECrRUcicGwe9dI2IrTF5UZilOmOSqKMgGFE55Ia/27koJ5U287 rkrrKRYiij1pR5FfQSwAkuFoXzq0Y2E= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-30_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 clxscore=1015 suspectscore=0 spamscore=0 phishscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606300105 On 6/30/26 12:23 PM, Kuldeep Singh wrote: >> qcom_ice_probe() >> -> qcom_ice_create() >> -> devm_clk_get_optional_enabled() >> >> If we remove the _enabled suffix and put a ice_resume() in ice_get(), >> I believe this is no longer an issue > > I see your point. > devm_clk_get_optional_enabled turns clocks on, whereas using > devm_clk_get_optioanl will only get handle but don't enable clock. > Please note, clocks are needed at probe to read ice hw version Right, but we don't need them afterwards in the probe function. We can simply gate them. There's a parallel effort to enable runtime PM in the driver: https://lore.kernel.org/linux-arm-msm/20260512033750.3393050-3-linlin.zhang@oss.qualcomm.com/ and with that all you'd need after getting the clock is a pm_runtime_resume_and_get() before the version check, followed by a pm_runtime_put() right after it > and then > later ufs/sdhc fetch ice instance using of_qcom_ice_get() and control > suspend/resume path. > > But my idea is, if storage itself isn't there(like sdhc on > qcs6490-rb3gen2) then why sdhc-ice should even probe and check hardware > version? as there's no significance in even probing ice. On the developer/customer experience side, would you expect having to manually enable what's essentially a sub-feature of the storage media on every single board? Konrad