Re: [PATCH v8 6/9] arm64: dts: qcom: qcs6490-rb3gen2: Add WSA8830 speakers amplifier

[Prasad Kumpatla <quic_pkumpatl@quicinc.com>]

On 9/2/2025 8:21 PM, Bjorn Andersson wrote:
> On Thu, Aug 21, 2025 at 10:19:11AM +0530, Prasad Kumpatla wrote:
>> From: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
>>
>> Add nodes for WSA8830 speakers amplifier on qcs6490-rb3gen2 board.
>>
>> Enable lpass_wsa and lpass_va macros along with pinctrl settings
>> for audio.
>>
>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
>> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
>> ---
>>   .../boot/dts/qcom/qcs6490-audioreach.dtsi     |  6 ++++
>>   arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts  | 35 +++++++++++++++++++
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi          |  8 +++++
>>   3 files changed, 49 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
>> index 6d3a9e171066..078936237e20 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi
>> @@ -58,6 +58,12 @@ &lpass_va_macro {
>>   	clock-names = "mclk",
>>   		      "macro",
>>   		      "dcodec";
>> +
>> +	pinctrl-0 = <&lpass_dmic01_clk>, <&lpass_dmic01_data>,
>> +		    <&lpass_dmic23_clk>, <&lpass_dmic23_data>;
> 
> Does all QCS6490 boards with AudioReach have these two (4?) DMICs? Is
> this board-specific or generic?

yes, all QCS6490 boards are with default 4-DMICs.


> 
>> +	pinctrl-names = "default";
>> +
>> +	qcom,dmic-sample-rate = <4800000>;
>>   };
>>   
>>   &lpass_wsa_macro {
>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> index 7509c27bd3f8..09e2cb9053a6 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
>> @@ -19,6 +19,7 @@
>>   #include "pm7325.dtsi"
>>   #include "pm8350c.dtsi"
>>   #include "pmk8350.dtsi"
>> +#include "qcs6490-audioreach.dtsi"
>>   
>>   /delete-node/ &ipa_fw_mem;
>>   /delete-node/ &rmtfs_mem;
>> @@ -765,6 +766,14 @@ redriver_usb_con_sbu: endpoint {
>>   	};
>>   };
>>   
>> +&lpass_va_macro {
>> +	status = "okay";
>> +};
>> +
>> +&lpass_wsa_macro {
>> +	status = "okay";
>> +};
>> +
>>   &mdss {
>>   	status = "okay";
>>   };
>> @@ -1039,6 +1048,32 @@ &sdhc_2 {
>>   	status = "okay";
>>   };
>>   
>> +&swr2 {
>> +	status = "okay";
>> +
>> +	left_spkr: speaker@0,1 {
>> +		compatible = "sdw10217020200";
>> +		reg = <0 1>;
>> +		reset-gpios = <&tlmm 158 GPIO_ACTIVE_LOW>;
>> +		#sound-dai-cells = <0>;
>> +		sound-name-prefix = "SpkrLeft";
>> +		#thermal-sensor-cells = <0>;
>> +		vdd-supply = <&vreg_l18b_1p8>;
>> +		qcom,port-mapping = <1 2 3 7>;
>> +	};
>> +
>> +	right_spkr: speaker@0,2 {
>> +		compatible = "sdw10217020200";
>> +		reg = <0 2>;
>> +		reset-gpios = <&tlmm 158 GPIO_ACTIVE_LOW>;
>> +		#sound-dai-cells = <0>;
>> +		sound-name-prefix = "SpkrRight";
>> +		#thermal-sensor-cells = <0>;
>> +		vdd-supply = <&vreg_l18b_1p8>;
>> +		qcom,port-mapping = <4 5 6 8>;
>> +	};
>> +};
>> +
>>   &tlmm {
>>   	gpio-reserved-ranges = <32 2>, /* ADSP */
>>   			       <48 4>; /* NFC */
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index c51c38cf147a..d472de18296b 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -3001,21 +3001,29 @@ lpass_tlmm: pinctrl@33c0000 {
>>   			lpass_dmic01_clk: dmic01-clk-state {
>>   				pins = "gpio6";
>>   				function = "dmic1_clk";
>> +				drive-strength = <8>;
>> +				bias-disable;
> 
> Does these settings belong in the SoC description? Are they fixed for
> all targets of sc7280, or are there any board-specific variations? Any
> variations based on which audio solution the board implements?

yes, these configs are fixed for all the variants of sc7280. These are 
on-SoC configs and don't change with variants.

Thanks,
Prasad

> 
> Regards,
> Bjorn
> 
>>   			};
>>   
>>   			lpass_dmic01_data: dmic01-data-state {
>>   				pins = "gpio7";
>>   				function = "dmic1_data";
>> +				drive-strength = <8>;
>> +				bias-pull-down;
>>   			};
>>   
>>   			lpass_dmic23_clk: dmic23-clk-state {
>>   				pins = "gpio8";
>>   				function = "dmic2_clk";
>> +				drive-strength = <8>;
>> +				bias-disable;
>>   			};
>>   
>>   			lpass_dmic23_data: dmic23-data-state {
>>   				pins = "gpio9";
>>   				function = "dmic2_data";
>> +				drive-strength = <8>;
>> +				bias-pull-down;
>>   			};
>>   
>>   			lpass_rx_swr_clk: rx-swr-clk-state {
>> -- 
>> 2.34.1
>>