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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab676116951sm752369466b.169.2025.01.28.03.26.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Jan 2025 03:26:35 -0800 (PST) Message-ID: <56dfc864-9a7e-4954-a7f6-91ff6b6d05ec@oss.qualcomm.com> Date: Tue, 28 Jan 2025 12:26:32 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/4] dt-bindings: clock: update interconnect cells for ipq5424 To: Manikanta Mylavarapu , andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, konradybcio@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: quic_srichara@quicinc.com, quic_varada@quicinc.com References: <20250125035920.2651972-1-quic_mmanikan@quicinc.com> <20250125035920.2651972-3-quic_mmanikan@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250125035920.2651972-3-quic_mmanikan@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: pCwKYnQIiZUB3sFUIhr-2Q9xrf67iRr7 X-Proofpoint-GUID: pCwKYnQIiZUB3sFUIhr-2Q9xrf67iRr7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_04,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 phishscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501280088 On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote: > Interconnect cells differ between the IPQ5332 and IPQ5424. > Therefore, update the interconnect cells according to the SoC. > > Signed-off-by: Manikanta Mylavarapu > --- > .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > index 1230183fc0a9..fac7922d2473 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml > @@ -35,8 +35,6 @@ properties: > - description: PCIE 2-lane PHY3 pipe clock source > > '#power-domain-cells': false > - '#interconnect-cells': > - const: 1 > > required: > - compatible > @@ -54,6 +52,9 @@ allOf: > clocks: > maxItems: 5 > > + '#interconnect-cells': > + const: 1 > + > - if: > properties: > compatible: > @@ -65,6 +66,9 @@ allOf: > minItems: 7 > maxItems: 7 > > + '#interconnect-cells': > + const: 2 Please apply some criticism to the review comments you receive.. this only makes sense for platforms using icc-rpm or icc-rpmh. Since this driver registers an interconnect provider through icc_clk APIs, it explicitly uses a simple, onecell translation function to .get the nodes Please drop this patch Konrad