From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751762AbcDNFKZ (ORCPT ); Thu, 14 Apr 2016 01:10:25 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:48718 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750935AbcDNFKV (ORCPT ); Thu, 14 Apr 2016 01:10:21 -0400 MIME-version: 1.0 Content-type: text/plain; charset=utf-8 X-AuditID: cbfee68d-f79e86d0000012da-0e-570f2639f70e Content-transfer-encoding: 8BIT Message-id: <570F2639.9070809@samsung.com> Date: Thu, 14 Apr 2016 14:10:17 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Rob Herring Cc: "myungjoo.ham@samsung.com" , Kyungmin Park , =?UTF-8?B?S3J6eXN6dG9mIEtvesWCb3dza2k=?= , Kukjin Kim , "Rafael J. Wysocki" , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King - ARM Linux , Anand Moon , Markus Reichl , Tobias Jakobi , "inki.dae@samsung.com" , linux-kernel , "linux-pm@vger.kernel.org" , linux-samsung-soc , linux-arm-kernel , devicetree Subject: Re: [PATCH v8 02/20] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver References: <1460089509-16260-1-git-send-email-cw00.choi@samsung.com> <1460089509-16260-3-git-send-email-cw00.choi@samsung.com> <20160411154012.GA24665@rob-hp-laptop> In-reply-to: X-Brightmail-Tracker: H4sIAAAAAAAAA02SfSzUcRzH+/o9urn160LfbpW5Vho5HU5fPa2t2X5r1Vr+UNnSxW8YzrnD 2NoIE/JwIXQr1VDoqnWxPM3joSjkVpmTCpOnGhNjhpzfH/rvtffn/Xl4bx8aE63iYjpUGc2p lYpwCSnA9baeUa7eB7f7HalOckGPjD0Eypl5QqCeqQqAcr9rcTQ9IUM5o9MY+pg0QyHD6BcC meoekGg+ywhQUW+jFXr5epBCZpMQTRqXACr7+skKmW+Vk0hb+AJHH7r7CbTeUEOh1OezxGlb Vl+sB2xKcibJmrKzrNjBoQS2VveNYiue/SVZQ2U6yb4pTWDXOii26vNtnM2uqgTsvGHfRZur ghNBXHhoLKd2O3VdEJIyJVZN7o8zPmwnE8HgngxgTUPGExaZJwHP9rBv+BWZAQS0iCkHsKlk AssA9KYprUrC62UAFpc0bjYImR1wKW8Yt3gwxgEa+8N4dIL5+RG8/QeA2WOlFG93hplNtZiF ceYAnP9Tj1uY3NCbJgZIS68dcxneeRdvkW0ZR7iSWkBYGGPWSbimPWzhnUwkLMw0Efz8OQDT Fpc251szvrBx8BdmKUBmiIYNU6sUv4yBi3mtOJ9lLzQ0Y3ze3bClfADXAnvdf2l0W2l0W2ke A6wS2HGqQJXmRrBaJtUoIjQxymBpYGSEAWx8RffaeFYNMDcfbwUMDSQ2wj690E9EKGI18RGt QL5xw11MbBcYufFIyugAmYeXO5J7yj3cj3p7SXYJHcXLviImWBHNhXGcilMHqGPCOU0rsKKt xYmg0qF90s+7kw4S3CtvuaSY70/2kYlO6rkqTW98rov05oo+aa5Neb/OTD31LxC1X6k9NLa0 IJ3b5tAW2DHuKnXyjius+Bl5fnbhd7XfsfrVZXcf2xGfCe21rLdu0pHSVII5l97V8H7E5FMR r2qpPwvkZirfXX4mqjMmrqvfX3dBgmtCFDJnTK1R/AMMdOK5EAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFKsWRmVeSWpSXmKPExsVy+t9jAV1LNf5wg9l7lS3mHznHatH/ZiGr xblXKxktJt2fwGLx+oWhRf/j18wWZ5vesFtsenyN1eLyrjlsFp97jzBazDi/j8li3cZb7Ba3 L/NavDzyg9Fi6fWLTBa3G1ewWUyYvpbF4szpS6wW//fsYLdoW/2B1UHEY828NYweLc09bB6X +3qZPG7dqffYOesuu8fK5V/YPDat6mTz2Lyk3uPfMXaPLVfbWTz6tqxi9Pi8SS6AJ6qB0SYj NTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6E0lhbLEnFKg UEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY0bLK6mCl8oVR+YeZWtgvCXTxcjBISFg ItGxRamLkRPIFJO4cG89WxcjF4eQwFJGiXmL9zGCJHgFBCV+TL7HAlLPLCAvceRSNoSpLjFl Si5E+QNGib4nS9ghyrUkevbvZAaxWQRUJT6/280CYrMBxfe/uMEG0isqECHRfaISJCwioCjx u20aK4jNLPCfTeLfBB0QW1ggX2J6z2VWiPkfGSU6vv0Am88pECyx79Zz5gmMArOQXDcL4bpZ CNctYGRexSiRWpBcUJyUnmuUl1quV5yYW1yal66XnJ+7iRGcjp5J72A8vMv9EKMAB6MSD6/G et5wIdbEsuLK3EOMEhzMSiK81+T5w4V4UxIrq1KL8uOLSnNSiw8xmgK9N5FZSjQ5H5gq80ri DY1NzIwsjcwNLYyMzZXEeR//XxcmJJCeWJKanZpakFoE08fEwSnVwChpLSC8crfAlb8bvJh4 WY9OjYhUimjtPpP8b89F6V3KD++FmjGKrvhUVackPH8nv23zzrRKs9mSq9MrtOYLiKZcLw5V Z/+/NTwr+b5h4L7LE/a3VgZPPPG80tYkUXZVkm+XV8S9xdoVcu3Fn10vKxWypx20VjqRE3L8 rdbSZf+MK2yEN/qbKrEUZyQaajEXFScCACa5CDRdAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 2016년 04월 12일 05:25, Chanwoo Choi wrote: > Hi Rob, > > On Tue, Apr 12, 2016 at 12:40 AM, Rob Herring wrote: >> On Fri, Apr 08, 2016 at 01:24:51PM +0900, Chanwoo Choi wrote: >>> This patch adds the documentation for generic exynos bus frequency >>> driver. >>> >>> Signed-off-by: Chanwoo Choi >>> Reviewed-by: Krzysztof Kozlowski >>> Signed-off-by: MyungJoo Ham >>> --- >>> .../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++++++++++++++++++++++ >>> 1 file changed, 95 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt >>> >>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt >>> new file mode 100644 >>> index 000000000000..78171b918e3f >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt >>> @@ -0,0 +1,95 @@ >>> +* Generic Exynos Bus frequency device >>> + >>> +The Samsung Exynos SoC has many buses for data transfer between DRAM >>> +and sub-blocks in SoC. Most Exynos SoCs share the common architecture >>> +for buses. Generally, each bus of Exynos SoC includes a source clock >>> +and a power line, which are able to change the clock frequency >>> +of the bus in runtime. To monitor the usage of each bus in runtime, >>> +the driver uses the PPMU (Platform Performance Monitoring Unit), which >>> +is able to measure the current load of sub-blocks. >>> + >>> +There are a little different composition among Exynos SoC because each Exynos >>> +SoC has different sub-blocks. Therefore, shch difference should be specified >>> +in devicetree file instead of each device driver. In result, this driver >>> +is able to support the bus frequency for all Exynos SoCs. >> >> I still have issues with this whole series. The DT hierarchy represents >> buses. You are describing buses here and control of them. I would expect >> to see some hierarchy, but there is none. What this looks like is you >> are adding nodes based on what fits the current driver. > > I already replied[1] about your same question on v2 patchset four 4 months ago. > [1] https://lkml.org/lkml/2015/12/10/943 > > I attach the your question and my reply history as following: > --------------------------------------------------------------------- > [ Discussion between you and me on v2 patchset[1] ] >>>> >>>> This still has the same problem as before. I would expect that the bus >>>> hierarchy in the dts match the hierarchy here. You just have flat nodes >>>> in the example below. So all IP blocks affected by frequency scaling >>>> should be under the bus node defining the OPPs. Something like this: >>> >>> The each bus of sub-block has not h/w dependency among sub-blocks >>> and has the owned source clock / OPP table. Just they share the same >>> power line. So, I think that flat nodes in the example below is not problem. >> >> I'm talking about the peripherals not described here. Is the ISP block >> not a child of the bus_isp node? Same for the display controller block >> and bus_lcd0. And so on. > >>>From the H/W point of view, ISP block is really not included in ISP's > AXI bus (bus_isp). > Just, the bus_isp connect to between ISP block and DRAM. > --------------------------------------------------------------------- I'm considering about your comment about hierarchy. But, I think it is not appropriate. there is no perfect paired set between sub-block and dvfs driver for AMBA bus. For example about Exynos5420's JPEG IP, There are two JPEG IPs in the Exynos5420. But two JPEG IPs use the same source clock for AMBA AXI line to transfer data between DRAM and JPEG as following: (AXI master) (AXI slave) JPEG_0 --|-----(AXI)-----| | |---- DRAM JPEG_1 --|-----(AXI)-----| Two AMBA buses use the same source clock. So, only one dvfs driver should handle the source clock for AXI bus. Also, two JPEG use the same AMBA APB line to configure the register of JPEG IP as following: (APB slave) (APB master) JPEG_0 --|-----(APB)-----| | |---- CPU JPEG_1 --|-----(APB)-----| The JPEG_0/1 could not be included in both AXI and APB in Device Tree. Additionally, the I2C/SPI/PCI and etc use the APB bus for communication between each controller and CPU. I'll expect your reply. Best Regards, Chanwoo Choi