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[2003:f6:ef15:2100:888:d3c6:a442:4910]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-430d70b4462sm41474825e9.30.2024.10.10.01.29.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2024 01:29:04 -0700 (PDT) Message-ID: <57169283416bf7902523891ba03d1f878772ffe5.camel@gmail.com> Subject: Re: [PATCH 0/2] pwm: axi-pwmgen: always enable FORCE_ALIGN From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= Cc: Michael Hennerich , Nuno =?ISO-8859-1?Q?S=E1?= , Trevor Gamblin , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org Date: Thu, 10 Oct 2024 10:33:20 +0200 In-Reply-To: <20241009-pwm-axi-pwmgen-enable-force_align-v1-0-5d6ad8cbf5b4@baylibre.com> References: <20241009-pwm-axi-pwmgen-enable-force_align-v1-0-5d6ad8cbf5b4@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2024-10-09 at 16:11 -0500, David Lechner wrote: > When using the axi-pwmgen as a trigger for ADCs, we've found that the > default behavior of the PWMGEN IP block is not ideal. The default > behavior is to wait for the period of all PWM outputs to run out before > applying any new settings. But there isn't a way to block until this > happens (and even if there was, it could take a long time). So the > pwm apply function returns before the new settings are actually applied. >=20 > This makes certain use cases impossible. For example, to use the PWM > like a GPIO to create a single pulse on and off to trigger a single ADC > conversion. >=20 > The AXI PWMGEN has a FORCE_ALIGN configuration option that changes the > behavior so that any new output settings (period, duty cycle, etc.) are > applied immediately. This can cause glitches in the output, but makes > the PWM actually useable for most applications. >=20 > Also, there was a naming conflict with register names, so there is a > preliminary cleanup patch to sort that out. >=20 > --- Reviewed-by: Nuno Sa > David Lechner (2): > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pwm: axi-pwmgen: rename 0x10 register > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pwm: axi-pwmgen: enable FORCE_ALIGN by def= ault >=20 > =C2=A0drivers/pwm/pwm-axi-pwmgen.c | 24 ++++++++++++++++++------ > =C2=A01 file changed, 18 insertions(+), 6 deletions(-) > --- > base-commit: ff25451372ee1aa4c4f4401dc96516782a00dd4d > change-id: 20241009-pwm-axi-pwmgen-enable-force_align-cfb403da4612 >=20 > Best regards,