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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5498b0bd08asm1407721e87.124.2025.03.10.03.44.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 Mar 2025 03:44:39 -0700 (PDT) Message-ID: <57222e16-0760-4832-ac15-0bd5ffe21077@linaro.org> Date: Mon, 10 Mar 2025 12:44:25 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/4] arm64: dts: qcom: x1e80100: Add CAMCC block definition Content-Language: ru-RU To: Bryan O'Donoghue , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Mauro Carvalho Chehab , Bjorn Andersson , Michael Turquette , Stephen Boyd , Jagadeesh Kona , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio References: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-0-c2964504131c@linaro.org> <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-2-c2964504131c@linaro.org> From: Vladimir Zapolskiy In-Reply-To: <20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-2-c2964504131c@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hello Bryan. On 1/19/25 02:54, Bryan O'Donoghue wrote: > Add the CAMCC block for x1e80100. The x1e80100 CAMCC block is an iteration > of previous CAMCC blocks with the exception of having two required > power-domains not just one. > > Reviewed-by: Vladimir Zapolskiy > Reviewed-by: Konrad Dybcio > Signed-off-by: Bryan O'Donoghue > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 9d38436763432..10035bcfa89bb 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -5,6 +5,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -5109,6 +5110,21 @@ usb_1_ss1_dwc3_ss: endpoint { > }; > }; > > + camcc: clock-controller@ade0000 { > + compatible = "qcom,x1e80100-camcc"; > + reg = <0 0x0ade0000 0 0x20000>; > + clocks = <&gcc GCC_CAMERA_AHB_CLK>, > + <&bi_tcxo_div2>, > + <&bi_tcxo_ao_div2>, > + <&sleep_clk>; > + power-domains = <&rpmhpd RPMHPD_MXC>, > + <&rpmhpd RPMHPD_MMCX>; > + required-opps = <&rpmhpd_opp_low_svs>; Since I believe here is the error in the device tree bindings, it makes sense to fix it before adding the clock controller into the platform dtsi file, please review the proposed change: https://lore.kernel.org/all/20250304143152.1799966-1-vladimir.zapolskiy@linaro.org/ > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > mdss: display-subsystem@ae00000 { > compatible = "qcom,x1e80100-mdss"; > reg = <0 0x0ae00000 0 0x1000>; > -- Best wishes, Vladimir