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From: Nicolai Buchwitz <nb@tipi-net.de>
To: James Clark <jjc@jclark.com>
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>,
	netdev@vger.kernel.org, Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S . Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@kernel.org>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Miroslav Lichvar <mlichvar@redhat.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next] net: stmmac: ptp: switch to gettimex64() interface
Date: Thu, 08 Oct 2026 09:44:03 +0200	[thread overview]
Message-ID: <573ab838519f1fcfc19b5c03c23aa72f@tipi-net.de> (raw)
In-Reply-To: <20261006103610.98277-1-jjc@jclark.com>

Hi James

On 6.10.2026 12:36, James Clark wrote:
> The stmmac PTP support currently implements the gettime64 callback to
> retrieve the hardware clock time. Update the implementation to provide
> the gettimex64 callback instead, adding support for the
> PTP_SYS_OFFSET_EXTENDED ioctl.
> 
> The system clock readings are taken around the read of the nanoseconds
> register in get_systime(), so get_systime() gains a 
> ptp_system_timestamp
> argument. rmb() is used to ensure proper ordering on weakly ordered
> architectures.
> 
> Assisted-by: LLM
> Signed-off-by: James Clark <jjc@jclark.com>
> ---
> Tested on a Radxa ZERO 3E (RK3566, DWMAC 4/5) running net-next.
> Width of the interval between the two system clock readings
> bracketing each PHC read (2000 calls of 25 samples each):
> 
>                                          min      median
> Before patch (PTP_SYS_OFFSET):           875 ns   1167 ns
> After patch (PTP_SYS_OFFSET_EXTENDED):   291 ns    584 ns
> 
> On this board the 24 MHz arch timer counter advances in steps of 7
> (~292 ns), so all intervals are multiples of that.

> [...]

> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c 
> b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c

> [...]

> @@ -191,8 +192,14 @@ static void get_systime(void __iomem *ioaddr, u64 
> *systime)
>  	sec1 = readl_relaxed(ioaddr + PTP_STSR);
>  	do {
>  		sec0 = sec1;
> +		ptp_read_system_prets(sts);
> +		if (sts)
> +			rmb();
>  		/* Get the TSSS value */
>  		ns = readl_relaxed(ioaddr + PTP_STNSR);
> +		if (sts)
> +			rmb();
> +		ptp_read_system_postts(sts);

Additional thought while testing on my stm32mp2:

Would a plain readl() for PTP_STNSR be enough? readl() completes before
a following delay loop, which is the counter read postts does. That 
would
drop both barriers, like igb/ice/bnxt. Fine either way though, macb has
the same rmb() pattern.

Maxime (Chevallier), what do you think?

> [...]

Thanks,
Nicolai

  parent reply	other threads:[~2026-10-08  7:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-06 10:36 James Clark
2026-10-06 22:11 ` Nicolai Buchwitz
2026-10-08  7:44 ` Nicolai Buchwitz [this message]
2026-10-08  9:19   ` Maxime Chevallier

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