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Fri, 9 Jan 2026 07:23:44 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AWDk16gtyiWw Date: Fri, 09 Jan 2026 12:23:23 +0000 From: "Jiaxun Yang" To: "Thomas Gleixner" , "Huacai Chen" Cc: loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, "Xuefeng Li" , "Huacai Chen" Message-Id: <57748542-d86e-4528-bea3-8f8d8f1abbed@app.fastmail.com> In-Reply-To: <87bjj3rnra.ffs@tglx> References: <20251223080437.3367240-1-chenhuacai@loongson.cn> <20251223080437.3367240-2-chenhuacai@loongson.cn> <87bjj3rnra.ffs@tglx> Subject: Re: [PATCH 1/7] irqchip/loongarch-avec: Adjust irqchip driver for 32BIT/64BIT Content-Type: text/plain Content-Transfer-Encoding: 7bit On Fri, 9 Jan 2026, at 12:09 PM, Thomas Gleixner wrote: > On Tue, Dec 23 2025 at 16:04, Huacai Chen wrote: > >> csr_read64() is only available on 64BIT LoongArch platform, so use >> recently added adaptive csr_read() instead, so as to make the driver >> work on both 32BIT and 64BIT platform. >> >> BTW, make avecintc_enable() be a no-op since it is only needed by 64BIT >> platform. >> >> Signed-off-by: Jiaxun Yang >> Signed-off-by: Huacai Chen > > I assume Jiaxun is the author, which means that this lacks a > > From: Jiaxun > > line in the mail body before the change log starts. Please try again. Yes, Huacai could you please get it fixed? > >> static inline void avecintc_enable(void) >> { >> +#ifdef CONFIG_MACH_LOONGSON64 >> u64 value; >> >> value = iocsr_read64(LOONGARCH_IOCSR_MISC_FUNC); >> value |= IOCSR_MISC_FUNC_AVEC_EN; >> iocsr_write64(value, LOONGARCH_IOCSR_MISC_FUNC); >> +#endif > > Can't this be: > > if (IS_ENABLED(CONFIG_MACH_LOONGSON64)) > > which is preferred over ifdeffery? Sadly, iocsr_read64 symbol is only available on 64 bit systems, so it must be guarded somehow. Thanks > > Thanks, > > tglx -- - Jiaxun