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b=v0xqeYr+NuGp7Jd7H/6F+fsb33//xjxGjQpeWodSse3aODv/iUNuwAXwbbw4mOMbw8GR3AueJ7z/Y41Kr+n8Zv27WKY2bA7mX+RKyxxDHtZfiNo1wb0VPu6ko6N79+tJdZeTHRM3mbMyjat55AZfwMICI6ht6g2oww5Lg4mapuE= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB8476.namprd12.prod.outlook.com (2603:10b6:8:17e::15) by IA1PR12MB9030.namprd12.prod.outlook.com (2603:10b6:208:3f2::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.17; Wed, 13 Nov 2024 16:58:51 +0000 Received: from DM4PR12MB8476.namprd12.prod.outlook.com ([fe80::2ed6:28e6:241e:7fc1]) by DM4PR12MB8476.namprd12.prod.outlook.com ([fe80::2ed6:28e6:241e:7fc1%3]) with mapi id 15.20.8158.013; Wed, 13 Nov 2024 16:58:51 +0000 Message-ID: <578485e4-8983-412a-a214-921c450a225a@amd.com> Date: Wed, 13 Nov 2024 09:58:46 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] drm/amd/display: Remove redundant check To: Bhavin Sharma , alexander.deucher@amd.com Cc: tarang.raval@siliconsignals.io, Chaitanya Dhere , Jun Lei , Harry Wentland , Leo Li , Rodrigo Siqueira , =?UTF-8?Q?Christian_K=C3=B6nig?= , Xinhui Pan , David Airlie , Simona Vetter , Kenneth Feng , Wenjing Liu , Roman Li , Leo Ma , Jose Fernandez , Aurabindo Pillai , Ilya Bakoulin , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20241111120900.63869-1-bhavin.sharma@siliconsignals.io> <20241111120900.63869-2-bhavin.sharma@siliconsignals.io> Content-Language: en-US From: Alex Hung In-Reply-To: <20241111120900.63869-2-bhavin.sharma@siliconsignals.io> Content-Type: text/plain; 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> unsigned int data_pitch = 0; > unsigned int meta_pitch = 0; > - unsigned int ppe = mode_422 ? 2 : 1; > + unsigned int ppe = 1; > bool surf_linear; > bool surf_vert; > unsigned int bytes_per_element; This is fixed in amd-staging-drm-next by the following commit and it's no longer needed. ec680fdbb29a drm/amd/display: Remove always-false branches > diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c > index ebd5df1a36e8..85f6f8e43947 100644 > --- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c > +++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c > @@ -1093,14 +1093,11 @@ static bool setup_dsc_config( > if (!is_dsc_possible) > goto done; > > - // Final decission: can we do DSC or not? > - if (is_dsc_possible) { > - // Fill out the rest of DSC settings > - dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported; > - dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth; > - dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4; > - dsc_cfg->is_dp = dsc_sink_caps->is_dp; > - } > + // Fill out the rest of DSC settings > + dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported; > + dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth; > + dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4; > + dsc_cfg->is_dp = dsc_sink_caps->is_dp; > > done: > if (!is_dsc_possible) This looks to me. Please revise and include this part in V2. Thanks.