From: Andrea Tomassetti <andrea.tomassetti@sipearl.com>
To: Srinivas Kandagatla <srini@kernel.org>,
"linusw@kernel.org" <linusw@kernel.org>
Cc: "johan+linaro@kernel.org" <johan+linaro@kernel.org>,
"krzk@kernel.org" <krzk@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"peda@axentia.se" <peda@axentia.se>
Subject: Re: [PATCH v2] mux: gpio-mux: add support for 4:1 2-channels mux
Date: Tue, 30 Jun 2026 15:08:09 +0000 [thread overview]
Message-ID: <57cd1b9d-2ee4-48b7-873a-c8baa162c3ab@sipearl.com> (raw)
In-Reply-To: <87032e28-9527-4513-a5ef-38afe0006480@kernel.org>
Hi Srinivas,
thank you for your thorough review.
On 6/19/26 19:23, Srinivas Kandagatla wrote:
> "mux: gpio-mux: add support for multiple mux controls" would be more
> reflective of what is done in the patch.
>
Noted, I will update it in v3.
>>
>> - mux_chip = devm_mux_chip_alloc(dev, 1, sizeof(*mux_gpio));
>> + ret = device_property_read_u32(dev, "#mux-control-cells", &cells);
>> + if (ret < 0)
>> + cells = 0;
>> +
>> + if (cells >= 2) {
>
> This code snippet is duplicated once again, may its time for this to go
> to as helper function, either in core or somewhere common.
>
What were you envisioning? A simple macro in mux/driver.h? Or more a proper
function in drivers/mux/core.c?
>> + dev_err(dev, "invalid control-cells %u, must be 0 or 1\n", cells);
>
> mux-control-cells would give useful message to user rather than just
> control-cells.
>
Noted, I will update it in v3.
>> + return -EINVAL;
>> + }
>> +
>> + mux_chip = devm_mux_chip_alloc(dev, cells + 1, sizeof(*mux_gpio));
>
> We are now allocating n mux_controls, however mux_gpio_set is not
> protected against multiple controllers accessing the same gpio resource.
>
>
This is a great point. I see two different type of "race conditions" here:
1. serialize accesses in mux_gpio_set
2. "logical race condition" due to how the upper locking mechanism is
handled by mux/core.c
The first issue can be easily solved by adding a mutex inside struct mux_gpio
and use it to serialize accesses in mux_gpio_set.
OTOH, the second issue is more nasty and depends on how the upper locking
mechanism is handled by mux/core.c. Please, correct me if I'm wrong, but to me
it looks like that the core's locking model assumes each mux_control is an
independently lockable resource. While this is generally true, it doesn't apply
in the case when there's only one controller that jointly controls two or more
gpio-muxes. Like in this case.
So, adding a mutex at gpio-mux level would fix the race condition of two
consumers changing the state at the same time (issue 1). But, to my
understanding, it won't fix issue 2: mutual exclusion on the write makes each
write atomic, but consumer A's selection can still be immediately hijacked by
consumer B's, leaving A believing it is reading what it just set when it's
actually reading whatever B last selected. This happens because the lock used in
mux/core.c is allocated _per controller_ and not _per chip_. Do you agree with
my analysis?
If you agree, I can fix issue 1 but I'd lean towards treating issue 2 as out of
scope for this patch. Let me know if you see it differently.
Br,
Andrea
next prev parent reply other threads:[~2026-06-30 15:23 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-30 14:11 [PATCH RESEND] " Andrea Tomassetti
2026-05-05 8:23 ` Linus Walleij
2026-05-05 15:20 ` Andrea Tomassetti
2026-05-06 7:58 ` Linus Walleij
2026-05-06 12:33 ` [PATCH v2] " Andrea Tomassetti
2026-06-03 11:43 ` Andrea Tomassetti
2026-06-03 14:00 ` Krzysztof Kozlowski
2026-06-08 22:54 ` Linus Walleij
2026-06-17 13:09 ` Tommaso Merciai
2026-06-18 13:04 ` Linus Walleij
2026-06-18 13:27 ` Tommaso Merciai
2026-06-19 3:51 ` Krzysztof Kozlowski
2026-06-23 16:44 ` Tommaso Merciai
2026-06-24 8:59 ` Geert Uytterhoeven
2026-06-24 9:59 ` Krzysztof Kozlowski
2026-06-24 9:55 ` Krzysztof Kozlowski
2026-06-24 22:03 ` Linus Walleij
2026-06-24 22:11 ` Linus Walleij
2026-06-25 9:19 ` Nuno Sá
2026-06-29 19:27 ` Linus Walleij
2026-07-03 7:32 ` Michael Hennerich
2026-07-03 10:02 ` Miclaus, Antoniu
2026-07-03 13:19 ` Alvin Šipraga
2026-07-03 13:45 ` Lad, Prabhakar
2026-06-19 17:23 ` Srinivas Kandagatla
2026-06-30 15:08 ` Andrea Tomassetti [this message]
2026-07-03 8:10 ` Srinivas Kandagatla
2026-07-08 14:08 ` Peter Rosin
2026-06-25 9:32 Lad, Prabhakar
2026-06-25 9:43 ` Krzysztof Kozlowski
2026-06-25 9:49 ` Greg Kroah-Hartman
2026-06-25 9:59 ` Lad, Prabhakar
2026-06-29 19:24 ` Linus Walleij
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