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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id z24sm973311ejd.3.2022.01.18.10.46.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Jan 2022 10:46:44 -0800 (PST) Message-ID: <581732d1-8d86-f7c6-ebbf-795b48e5e67f@canonical.com> Date: Tue, 18 Jan 2022 19:46:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.1 Subject: Re: [PATCH v2 15/16] arm64: dts: fsd: Add initial pinctrl support Content-Language: en-US To: Alim Akhtar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: soc@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, olof@lixom.net, arnd@arndb.de, linus.walleij@linaro.org, catalin.marinas@arm.com, robh+dt@kernel.org, s.nawrocki@samsung.com, linux-samsung-soc@vger.kernel.org, pankaj.dubey@samsung.com, linux-fsd@tesla.com, Shashank Prashar , Aswani Reddy References: <20220118144851.69537-1-alim.akhtar@samsung.com> <20220118144851.69537-16-alim.akhtar@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <20220118144851.69537-16-alim.akhtar@samsung.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/01/2022 15:48, Alim Akhtar wrote: > Add initial pin configuration nodes for FSD SoC. > > Cc: linux-fsd@tesla.com > Signed-off-by: Shashank Prashar > Signed-off-by: Aswani Reddy > Signed-off-by: Alim Akhtar > --- > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 335 +++++++++++++++++++++ > arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++ > 2 files changed, 357 insertions(+) > create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > new file mode 100644 > index 000000000000..371344e446f3 > --- /dev/null > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > @@ -0,0 +1,335 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Tesla Full Self-Driving SoC device tree source > + * > + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. > + * https://www.samsung.com > + * Copyright (c) 2017-2021 Tesla, Inc. > + * https://www.tesla.com > + */ > + > +#include > + > +&pinctrl_fsys0 { > + gpf0: gpf0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf1: gpf1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf6: gpf6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf4: gpf4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf5: gpf5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > +}; > + > +&pinctrl_peric { > + gpc8: gpc8 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf2: gpf2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf3: gpf3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd0: gpd0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb0: gpb0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb1: gpb1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb4: gpb4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb5: gpb5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb6: gpb6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb7: gpb7 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd1: gpd1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd2: gpd2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd3: gpd3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg0: gpg0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg1: gpg1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg2: gpg2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg3: gpg3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg4: gpg4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg5: gpg5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg6: gpg6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg7: gpg7 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + pwm0_out: pwm0-out { > + samsung,pins = "gpb6-1"; > + samsung,pin-function = ; > + samsung,pin-pud = ; > + samsung,pin-drv = ; > + }; All pin configuration nodes with "-pins" suffix, even though current bindings do not mandate it. Less changes in the future. Best regards, Krzysztof