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Tue, 02 Jun 2026 22:28:19 -0700 (PDT) X-Received: by 2002:a05:6a20:748a:b0:398:6ea8:21d8 with SMTP id adf61e73a8af0-3b49759433cmr2261470637.15.1780464498951; Tue, 02 Jun 2026 22:28:18 -0700 (PDT) Received: from [10.204.78.54] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c85df0a624fsm986006a12.18.2026.06.02.22.28.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Jun 2026 22:28:18 -0700 (PDT) Message-ID: <587b450c-c527-4c6a-b48b-8a7a266bd673@oss.qualcomm.com> Date: Wed, 3 Jun 2026 10:58:09 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/15] accel/qda: Add compute bus for QDA context banks To: Dmitry Baryshkov Cc: Oded Gabbay , Jonathan Corbet , Shuah Khan , Joerg Roedel , Will Deacon , Robin Murphy , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Sumit Semwal , =?UTF-8?Q?Christian_K=C3=B6nig?= , Bharath Kumar , Chenna Kesava Raju , srini@kernel.org, andersson@kernel.org, konradybcio@kernel.org, robin.clark@oss.qualcomm.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org References: <20260519-qda-series-v1-0-b2d984c297f8@oss.qualcomm.com> <20260519-qda-series-v1-4-b2d984c297f8@oss.qualcomm.com> Content-Language: en-US From: Ekansh Gupta In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: whNfKH6XJ7rNqiKKSQUo5BAaY1GVkqOz X-Proofpoint-GUID: whNfKH6XJ7rNqiKKSQUo5BAaY1GVkqOz X-Authority-Analysis: v=2.4 cv=MKFQXsZl c=1 sm=1 tr=0 ts=6a1fbb74 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=fSmyMkXI2XJwL8L7xYwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAzMDA0OSBTYWx0ZWRfXymL8VuJWX0Ey 2ivn1nzgECOXdmIW0VqdWsmgH1CWbKKJ9t8fv5biQ99RtwublqRG3b7Ueddlm3KfI46G8+NECDu h/X1+hOHaNS+S+vHOS5HdFX+r10eeJM8U76x2jysqfEASVx9ocNvQZZ7m86YyLYgi0lruglvo+H XLItAObQulQT9MrczZA3N0WtDjnmduMhZHPQ4zW+M2w4FZBjJexlu//xuDfmOj0vbpgohIZ0WuZ qLd4vOZtK1cLTrFYhMnqkHQEyITD1CwQq9IPAzH7uAPwoS3Z0n/iTPcyqV4C1mi5yb4FNgcvfJ7 sCz+1yUpFspYijmuCDFmHOQjji6BxiMpAnzCDJZMvteiHfshiuaQUIhUHw4KYGJBWR1Zp5gWeef 9CGofq3JIzqPvMYnII0E+2ZOQxogyILHgrXy6Dr+f8ldwRE6ZEVjFovP7vCYcPE5wOuwVkE4Ewb rym4JrT3vu48fpfdVlQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-03_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 impostorscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 clxscore=1015 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606030049 On 20-05-2026 19:49, Dmitry Baryshkov wrote: > On Tue, May 19, 2026 at 11:45:54AM +0530, Ekansh Gupta via B4 Relay wrote: >> From: Ekansh Gupta >> >> Introduce a custom virtual bus (qda-compute-cb) for managing IOMMU >> context bank (CB) devices used by the QDA driver. >> >> IOMMU context banks are synthetic constructs — they are not real >> platform devices and do not appear as children of a platform bus node >> in the device tree. Using a platform driver to represent them was >> therefore incorrect and introduced a probe-ordering race: device nodes >> were created before the RPMsg channel resources were fully initialized, >> and because probe runs asynchronously, user-space could open a CB >> device and attempt to start a session before the underlying transport >> was ready. >> >> The qda-compute-cb bus solves this by allowing the main QDA driver to >> create CB devices explicitly and under its own control, making their >> lifetime strictly subordinate to the parent qda_dev. The bus provides >> a dma_configure callback that calls of_dma_configure() so that each CB >> device gets its own IOMMU domain derived from its device-tree node, >> enabling per-session memory isolation. >> >> The bus type and the CB device constructor (create_qda_cb_device) are >> exported for use by the QDA memory manager. >> >> A hidden Kconfig symbol (DRM_ACCEL_QDA_COMPUTE_BUS) is introduced and >> automatically selected by DRM_ACCEL_QDA so that the bus initialisation >> runs via postcore_initcall before any QDA device probes. >> >> Assisted-by: Claude:claude-4-6-sonnet >> Signed-off-by: Ekansh Gupta >> --- >> drivers/accel/Makefile | 1 + >> drivers/accel/qda/Kconfig | 4 +++ >> drivers/accel/qda/Makefile | 2 ++ >> drivers/accel/qda/qda_compute_bus.c | 68 +++++++++++++++++++++++++++++++++++++ >> include/linux/qda_compute_bus.h | 32 +++++++++++++++++ >> 5 files changed, 107 insertions(+) >> >> diff --git a/drivers/accel/Makefile b/drivers/accel/Makefile >> index 58c08dd5f389..9ed843cd293f 100644 >> --- a/drivers/accel/Makefile >> +++ b/drivers/accel/Makefile >> @@ -6,4 +6,5 @@ obj-$(CONFIG_DRM_ACCEL_HABANALABS) += habanalabs/ >> obj-$(CONFIG_DRM_ACCEL_IVPU) += ivpu/ >> obj-$(CONFIG_DRM_ACCEL_QAIC) += qaic/ >> obj-$(CONFIG_DRM_ACCEL_QDA) += qda/ >> +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda/ > > Ugh. The previous line should be enough (but don't trust me). I was seeing build failures if I don't add this. Took it as a reference from host1x driver and recent iris patch.> >> obj-$(CONFIG_DRM_ACCEL_ROCKET) += rocket/ >> \ No newline at end of file >> diff --git a/drivers/accel/qda/Kconfig b/drivers/accel/qda/Kconfig >> index 484d21ff1b55..2a61a4dda054 100644 >> --- a/drivers/accel/qda/Kconfig >> +++ b/drivers/accel/qda/Kconfig >> @@ -3,11 +3,15 @@ >> # Qualcomm DSP accelerator driver >> # >> >> +config DRM_ACCEL_QDA_COMPUTE_BUS >> + bool >> + >> config DRM_ACCEL_QDA >> tristate "Qualcomm DSP accelerator" >> depends on DRM_ACCEL >> depends on ARCH_QCOM || COMPILE_TEST >> depends on RPMSG >> + select DRM_ACCEL_QDA_COMPUTE_BUS >> help >> Enables the DRM-based accelerator driver for Qualcomm's Hexagon DSPs. >> This driver provides a standardized interface for offloading computational >> diff --git a/drivers/accel/qda/Makefile b/drivers/accel/qda/Makefile >> index dbe809067a8b..424176f652a5 100644 >> --- a/drivers/accel/qda/Makefile >> +++ b/drivers/accel/qda/Makefile >> @@ -8,3 +8,5 @@ obj-$(CONFIG_DRM_ACCEL_QDA) := qda.o >> qda-y := \ >> qda_drv.o \ >> qda_rpmsg.o >> + >> +obj-$(CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS) += qda_compute_bus.o >> diff --git a/drivers/accel/qda/qda_compute_bus.c b/drivers/accel/qda/qda_compute_bus.c >> new file mode 100644 >> index 000000000000..c59d977e924d >> --- /dev/null >> +++ b/drivers/accel/qda/qda_compute_bus.c >> @@ -0,0 +1,68 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +static int qda_cb_bus_dma_configure(struct device *dev) >> +{ >> + return of_dma_configure(dev, dev->of_node, true); >> +} >> + >> +const struct bus_type qda_cb_bus_type = { >> + .name = "qda-compute-cb", >> + .dma_configure = qda_cb_bus_dma_configure, >> +}; >> +EXPORT_SYMBOL_GPL(qda_cb_bus_type); >> + >> +static void release_qda_cb_device(struct device *dev) >> +{ >> + of_node_put(dev->of_node); >> + kfree(dev); >> +} >> + >> +struct device *create_qda_cb_device(struct device *parent_device, const char *name, >> + u64 dma_mask, struct device_node *of_node) >> +{ >> + struct device *dev; >> + int ret; >> + >> + dev = kzalloc_obj(*dev); >> + if (!dev) >> + return ERR_PTR(-ENOMEM); >> + >> + dev->release = release_qda_cb_device; >> + dev->bus = &qda_cb_bus_type; >> + dev->parent = parent_device; >> + dev->coherent_dma_mask = dma_mask; >> + dev->dma_mask = &dev->coherent_dma_mask; >> + dev->of_node = of_node_get(of_node); >> + >> + dev_set_name(dev, "%s", name); >> + >> + ret = device_register(dev); >> + if (ret) { >> + put_device(dev); >> + return ERR_PTR(ret); >> + } >> + >> + return dev; >> +} >> +EXPORT_SYMBOL_GPL(create_qda_cb_device); >> + >> +static int __init qda_cb_bus_init(void) >> +{ >> + int err; >> + >> + err = bus_register(&qda_cb_bus_type); >> + if (err < 0) { >> + pr_err("qda-compute-cb bus registration failed: %d\n", err); >> + return err; >> + } >> + return 0; >> +} >> + >> +postcore_initcall(qda_cb_bus_init); >> diff --git a/include/linux/qda_compute_bus.h b/include/linux/qda_compute_bus.h >> new file mode 100644 >> index 000000000000..90bf248c7285 >> --- /dev/null >> +++ b/include/linux/qda_compute_bus.h >> @@ -0,0 +1,32 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#ifndef __QDA_COMPUTE_BUS_H__ >> +#define __QDA_COMPUTE_BUS_H__ >> + >> +#include >> + >> +/* >> + * Custom bus type for QDA compute context bank (CB) devices >> + * >> + * This bus type is used for manually created CB devices that represent >> + * IOMMU context banks. The custom bus allows proper IOMMU configuration >> + * and device management for these virtual devices. >> + */ >> +#ifdef CONFIG_DRM_ACCEL_QDA_COMPUTE_BUS >> +extern const struct bus_type qda_cb_bus_type; >> + >> +struct device *create_qda_cb_device(struct device *parent_device, const char *name, >> + u64 dma_mask, struct device_node *of_node); >> +#else >> +static inline struct device *create_qda_cb_device(struct device *parent_device, >> + const char *name, u64 dma_mask, >> + struct device_node *of_node) >> +{ >> + return ERR_PTR(-ENODEV); >> +} >> +#endif >> + >> +#endif /* __QDA_COMPUTE_BUS_H__ */ >> >> -- >> 2.34.1 >> >> >