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Fri, 10 Apr 2026 03:16:45 -0700 (PDT) X-Received: by 2002:a17:90b:4fc9:b0:35d:a38a:a117 with SMTP id 98e67ed59e1d1-35e42815bccmr2699460a91.15.1775816204836; Fri, 10 Apr 2026 03:16:44 -0700 (PDT) Received: from [10.217.218.160] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35e42e4517fsm984703a91.4.2026.04.10.03.16.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Apr 2026 03:16:44 -0700 (PDT) Message-ID: <587ea315-9cc2-4ac8-919d-fe34b076f63f@oss.qualcomm.com> Date: Fri, 10 Apr 2026 15:46:38 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode To: Mukesh Savaliya , viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, sumit.semwal@linaro.org, christian.koenig@amd.com Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org, naresh.maramaina@oss.qualcomm.com References: <20260403084135.1300931-1-aniket.randive@oss.qualcomm.com> <818da0cf-06e8-4a26-955b-67a3d5392e91@oss.qualcomm.com> Content-Language: en-US From: Aniket RANDIVE In-Reply-To: <818da0cf-06e8-4a26-955b-67a3d5392e91@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEwMDA5NSBTYWx0ZWRfX9KiNol19peAQ r9GOGIVb/JL4MVBYV5yRYIPWyUTglA12lQ3tzxA1l//10D05ZAp36fb78LA+3am7vVYX6m32GvH XEo65ZIGurA+Yez1uLBeR++2d2UBXL9p/WLHdvmBkKf4mAz+JH01W+VkWrBiZT1R4W2/SgPsnCj Nu38WFVNP7IxBQpdBptxjcsu2b1DSmQ1z3sBpq7wXPKAEjx4WuH0aXo4ZmbRfHqCBZnDC7L71u/ frLya14bNDELQ4SUWiZjGYRFABr5ezMQT0wJHF5B8WI5x/xRgfL5wujTEEcLOBk7AOoCJ0uEau1 OGTwrF1wgcKwOXWGxxoH4VwU29wSchxFGNzLMKvuLu2a3d/fFqIW12AXJ1dQEJE+cdUXN6c0UXl HtdF4LNl55hT0ui52kwmcjmI+WoRx81ay9wT0m3n84YMJr6i3wqdDPul2CSw8GDqMa23/haYd91 he8HJhhMlMPCS8V4VZA== X-Proofpoint-GUID: 0NbvzlqQXnTwBorgV_5YQtzX6Cqsd8R2 X-Proofpoint-ORIG-GUID: 0NbvzlqQXnTwBorgV_5YQtzX6Cqsd8R2 X-Authority-Analysis: v=2.4 cv=O7YJeh9W c=1 sm=1 tr=0 ts=69d8ce0e cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=v7GTtkQuv75T_6NhELgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-10_03,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 phishscore=0 priorityscore=1501 adultscore=0 impostorscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604100095 On 4/6/2026 10:08 AM, Mukesh Savaliya wrote: > > > On 4/3/2026 2:11 PM, Aniket Randive wrote: >> In GPI mode, the I2C GENI driver programs an extra TX DMA transfer >> descriptor (TRE) on the TX channel when handling a single read message. >> This results in an unintended write phase being issued on the I2C bus, >> even though a read transaction does not require any TX data. >> >> For a single-byte read, the correct hardware sequence consists of the >> CONFIG and GO commands followed by a single RX DMA TRE. Programming an >> additional TX DMA TRE is redundant, causes unnecessary DMA buffer >> mapping on the TX channel, and may lead to incorrect bus behavior. >> >> Update the transfer logic to avoid programming a TX DMA TRE for single >> read messages in GPI mode. >> >> Co-developed-by: Maramaina Naresh >> Signed-off-by: Maramaina Naresh >> Signed-off-by: Aniket Randive >> --- >> Changes in v3: >>    - Added comment in the driver for better readability and changed the >>      position of 'skip_dma' label to allow dma engine configuration. >> >> Changes in v2: >>    - Updated the commit message. >> >>   drivers/i2c/busses/i2c-qcom-geni.c | 20 +++++++++++++++----- >>   1 file changed, 15 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/ >> i2c-qcom-geni.c >> index a4acb78fafb6..78b92db7c7fd 100644 >> --- a/drivers/i2c/busses/i2c-qcom-geni.c >> +++ b/drivers/i2c/busses/i2c-qcom-geni.c >> @@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, >> struct i2c_msg msgs[], >>   { >>       struct gpi_i2c_config *peripheral; >>       unsigned int flags; >> -    void *dma_buf; >> -    dma_addr_t addr; >> +    void *dma_buf = NULL; >> +    dma_addr_t addr = 0; >>       enum dma_data_direction map_dirn; >>       enum dma_transfer_direction dma_dirn; >>       struct dma_async_tx_descriptor *desc; >> @@ -639,6 +639,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev >> *gi2c, struct i2c_msg msgs[], >>       gi2c_gpi_xfer = &gi2c->i2c_multi_desc_config; >>       msg_idx = gi2c_gpi_xfer->msg_idx_cnt; >> +    /* Skip TX DMA map for I2C_WRITE operation to avoid unintended >> write cycle */ > Seems you are missing writing important point - For read message ? > Important is to clarity what's the condition we are handling, Skipping > something is anyway clear from goto skip_dma. Sure, will add more description in comment for better understanding. -Aniket >> +    if (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) { >> +        peripheral->multi_msg = true; >> +        goto skip_dma; >> +    } >> + >>       dma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1); >>       if (!dma_buf) { >>           ret = -ENOMEM; >> @@ -658,6 +664,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, >> struct i2c_msg msgs[], >>           goto out; >>       } >> +skip_dma: > Better name - skip_tx_dma_map ? Sure. I will change it. -Aniket >>       if (gi2c->is_tx_multi_desc_xfer) { >>           flags = DMA_CTRL_ACK; >> @@ -740,9 +747,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev >> *gi2c, struct i2c_msg msgs[], >>       return 0; >>   err_config: >> -    dma_unmap_single(gi2c->se.dev->parent, addr, >> -             msgs[msg_idx].len, map_dirn); >> -    i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); >> +    /* Avoid DMA unmap as the write operation skipped DMA mapping */ >> +    if (dma_buf) { >> +        dma_unmap_single(gi2c->se.dev->parent, addr, >> +                 msgs[msg_idx].len, map_dirn); >> +        i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); >> +    } >>   out: >>       gi2c->err = ret; >