From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751381AbdAVIRC (ORCPT ); Sun, 22 Jan 2017 03:17:02 -0500 Received: from regular1.263xmail.com ([211.150.99.138]:37200 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750912AbdAVIRB (ORCPT ); Sun, 22 Jan 2017 03:17:01 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: zyw@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zyw@rock-chips.com X-UNIQUE-TAG: <6ea9f3c08b9ae7ec691df16a6026b3c3> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned To: John Keeping , Mark Yao References: <20170121163128.22240-1-john@metanate.com> <20170121163128.22240-12-john@metanate.com> Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org From: Chris Zhong Message-ID: <58846A70.5040503@rock-chips.com> Date: Sun, 22 Jan 2017 16:16:48 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <20170121163128.22240-12-john@metanate.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi John Reviewed-by: Chris Zhong On 01/22/2017 12:31 AM, John Keeping wrote: > By dereferencing the MIPI command buffer as a u32* we rely on it being > correctly aligned on ARM, but this may not be the case. Copy it into a > stack variable that will be correctly aligned. > > Signed-off-by: John Keeping > --- > Unchanged in v2 > --- > drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > index 03fc096fe1bd..ddbc037e7ced 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > @@ -607,10 +607,10 @@ static int dw_mipi_dsi_dcs_short_write(struct dw_mipi_dsi *dsi, > static int dw_mipi_dsi_dcs_long_write(struct dw_mipi_dsi *dsi, > const struct mipi_dsi_msg *msg) > { > - const u32 *tx_buf = msg->tx_buf; > - int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret; > + const u8 *tx_buf = msg->tx_buf; > + int len = msg->tx_len, pld_data_bytes = sizeof(u32), ret; > u32 hdr_val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type); > - u32 remainder = 0; > + u32 remainder; > u32 val; > > if (msg->tx_len < 3) { > @@ -621,12 +621,14 @@ static int dw_mipi_dsi_dcs_long_write(struct dw_mipi_dsi *dsi, > > while (DIV_ROUND_UP(len, pld_data_bytes)) { > if (len < pld_data_bytes) { > + remainder = 0; > memcpy(&remainder, tx_buf, len); > dsi_write(dsi, DSI_GEN_PLD_DATA, remainder); > len = 0; > } else { > - dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf); > - tx_buf++; > + memcpy(&remainder, tx_buf, pld_data_bytes); > + dsi_write(dsi, DSI_GEN_PLD_DATA, remainder); > + tx_buf += pld_data_bytes; > len -= pld_data_bytes; > } >