From: Like Xu <like.xu.linux@gmail.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Ravi Bangoria <ravi.bangoria@amd.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Santosh Shukla <santosh.shukla@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Ananth Narayan <ananth.narayan@amd.com>,
Sandipan Das <sandipan.das@amd.com>
Subject: Re: [PATCH 0/5] KVM: x86/pmu: Hide guest counter updates from the VMRUN instruction
Date: Thu, 23 Mar 2023 16:16:02 +0800 [thread overview]
Message-ID: <589b70b6-6795-7f15-45c8-59a9736d3488@gmail.com> (raw)
In-Reply-To: <a53c8ba7-f66d-5bd7-c934-2357f42b3ac9@amd.com>
On 13/3/2023 6:57 pm, Sandipan Das wrote:
> +CC: Santosh, Tom, Ananth
>
> Hi Like,
>
> On 3/10/2023 4:23 PM, Like Xu wrote:
>> Considering that developers are more likely to have access to AMD VMs
>> and use vPMU inside guest, there's a dark cloud that needs to rain.
>> The x86_64/pmu_event_filter_test always fails on Zen3 boxes:
>>
>> test_amd_deny_list: Branch instructions retired = 43 (expected 42)
>> test_without_filter: Branch instructions retired = 43 (expected 42)
>> test_member_allow_list: Branch instructions retired = 43 (expected 42)
>> test_not_member_deny_list: Branch instructions retired = 43 (expected 42)
>>
>> ,which is not caused by the event_filter feature (otherwise it's zero).
>>
>> After some dubious guessing and microtesting on Zen3+ pmu hardware,
>> we found that VMRUN or one of the instructions in __svm_vcpu_run()
>> causes a guest-only enabled counter for counting guest instruction (in the
>> pmu_event_filter case, the branch instruction) to always increase by one
>> right after each vm_entry.
>>
>> This creates an inconsistency with the AMD64_EVENTSEL_GUESTONLY,
>> where the vPMU user in the VM does not expect to see any counter
>> changes due to the SVM transaction at all. This patch set provides a low
>> overhead software fix until HW change arrives or simply no fix planned.
>>
>
> Yes, VMRUNs do get counted as retired branches in the guest context. My
> understanding is that this behaviour applies to all generations of Zen
> and even some older ones too, not just Zen 3 and later. I also do not
> expect this to change in the near future.
>
> - Sandipan
>
Interesting, thanks for confirming this issue (I presume this is an official reply).
If this hardware behavior is not expected to change, this software-based correction
would be essential and urgent for those who only use vPMU inside AMD guests.
Let's see what will happen ...
prev parent reply other threads:[~2023-03-23 8:16 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 10:53 Like Xu
2023-03-10 10:53 ` [PATCH 1/5] KVM: x86/pmu: Emulate CTR overflow directly in kvm_pmu_handle_event() Like Xu
2023-03-10 10:53 ` [PATCH 2/5] KVM: x86/pmu: Add a helper to check if pmc has PEBS mode enabled Like Xu
2023-05-24 20:54 ` Sean Christopherson
2023-03-10 10:53 ` [PATCH 3/5] KVM: x86/pmu: Move the overflow of a normal counter out of PMI context Like Xu
2023-05-24 21:03 ` Sean Christopherson
2023-03-10 10:53 ` [PATCH 4/5] KVM: x86/pmu: Reorder functions to reduce unnecessary declarations Like Xu
2023-05-24 21:14 ` Sean Christopherson
2023-03-10 10:53 ` [PATCH 5/5] KVM: x86/pmu: Hide guest counter updates from the VMRUN instruction Like Xu
2023-04-07 2:18 ` Sean Christopherson
2023-04-07 8:15 ` Like Xu
2023-04-07 14:56 ` Sean Christopherson
2023-04-19 13:41 ` Like Xu
2023-04-26 5:25 ` Sandipan Das
2023-04-26 6:25 ` Like Xu
2023-05-24 20:41 ` Sean Christopherson
2023-05-24 20:47 ` Jim Mattson
2023-05-24 21:29 ` Sean Christopherson
2023-05-24 21:32 ` Jim Mattson
2023-05-29 14:51 ` Like Xu
2023-05-30 20:00 ` Jim Mattson
2023-05-24 21:23 ` Sean Christopherson
2023-05-24 21:30 ` Jim Mattson
2023-05-29 14:36 ` Like Xu
2023-03-13 10:57 ` [PATCH 0/5] " Sandipan Das
2023-03-23 8:16 ` Like Xu [this message]
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