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From: Logan Gunthorpe <logang@deltatee.com>
To: Serge Semin <fancer.lancer@gmail.com>,
	jdmason@kudzu.us, dave.jiang@intel.com, allenbh@gmail.com
Cc: Sergey.Semin@t-platforms.ru, linux-ntb@googlegroups.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ntb: idt: Set PCIe bus address to BARLIMITx
Date: Wed, 11 Jul 2018 10:52:29 -0600	[thread overview]
Message-ID: <58db6cb1-c62e-bedd-6542-9a0e40e3dd86@deltatee.com> (raw)
In-Reply-To: <20180711163224.30892-1-fancer.lancer@gmail.com>



On 11/07/18 10:32 AM, Serge Semin wrote:
> @@ -1320,7 +1321,9 @@ static int idt_ntb_peer_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx,
>  		idt_nt_write(ndev, bar->ltbase, (u32)addr);
>  		idt_nt_write(ndev, bar->utbase, (u32)(addr >> 32));
>  		/* Set the custom BAR aperture limit */
> -		limit = pci_resource_start(ntb->pdev, mw_cfg->bar) + size;
> +		pcibios_resource_to_bus(ntb->pdev->bus, &region,
> +					&ntb->pdev->resource[mw_cfg->bar]);
> +		limit = region.start + size;

You should use the pci_bus_address() helper instead. It's much simpler
and you don't need to delve into pci_dev internals to use it.

Logan

  reply	other threads:[~2018-07-11 16:52 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-11 16:32 Serge Semin
2018-07-11 16:52 ` Logan Gunthorpe [this message]
2018-07-11 20:40 ` [PATCH v2] " Serge Semin

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